USB 1.1.OTG PHY IP, OTG, UMC 65nm LL process
Faraday Technology
•
HQ:
Taiwan
USB 1.1 OTG PHY, UMC 65nm LL Logic/RVT Low-K process.
- UCIe 1.1
- UMC
- 65nm
- LL
Compare 2,955 UMC IP Cores from 31 vendors
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USB 1.1 PHY IP, UMC 65nm SP process
Faraday Technology• HQ: TaiwanID Detector for USB OTG Function, UMC 65nm SP/HVT Low-K Logic process.
- UCIe 1.1
- UMC
- 65nm
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USB 1.1 PHY IP, UMC 0.18um eFlash/G2 process
Faraday Technology• HQ: TaiwanUSB 1.1 PHY, UMC 0.18um e-flash process.
- UCIe 1.1
- UMC
- 180nm
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USB 1.1.OTG PHY IP, OTG, UMC 0.18um eFlash/G2 process
Faraday Technology• HQ: TaiwanUSB 1.1 OTG, UMC 0.18um e-flash process.
- UCIe 1.1
- UMC
- 180nm
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USB 1.1.OTG PHY IP, UMC 0.11um HS/FSG process
Faraday Technology• HQ: TaiwanUSB1.1 PHY feature USB 1.1 Type PHY, Technology Type process USB 1.1 On-The-Go PHY, UMC 0.11um HS/Copper Logic process.
- UCIe 1.1
- UMC
- 110nm
- HS
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SATA II PHY IP, Gen-2, UMC 90nm SP process
Faraday Technology• HQ: TaiwanSerial ATA I II PHY, UMC 90nm SP/RVT Low-K Logic process.
- UMC
- 90nm
- SP
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SATA II PHY IP, Gen-2, UMC 0.13um HS/FSG process
Faraday Technology• HQ: TaiwanOver sampling 1 port 3G/1.5G SATA PHY, UMC 0.13um HS+LL/FSG Logic process.
- UMC
- 130nm
- HS
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SATA II PHY IP, Gen-2, UMC 0.11um HS/AE process
Faraday Technology• HQ: Taiwan3G/1.5G Serial ATA PHY, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process.
- UMC
- 110nm
- HS
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PCI Express Gen2 PHY IP, PCIe Gen-2, 4 Lanes, UMC 90nm SP process
Faraday Technology• HQ: Taiwan4x lane PCI Express Gen II PHY, UMC 90nm SP/RVT Low-K Logic process.
- PCIe Gen2
- UMC
- 90nm
- SP
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PCI Express Gen2 PHY IP, PCIe Gen-2, 1 Lanes, UMC 90nm SP process
Faraday Technology• HQ: TaiwanPCI-Express II PHY, UMC 90nm SP/RVT Low-K process.
- PCIe Gen2
- UMC
- 90nm
- SP
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PCI Express Gen2 PHY IP, PCIe Gen-2, 1 Lanes, UMC 55nm SP process
Faraday Technology• HQ: TaiwanPCIE Gen.II, UMC 55nm SP/RVT Low-K Logic process.
- PCIe Gen2
- UMC
- 55nm
- SP
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PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.18um G2 process
Faraday Technology• HQ: TaiwanPCI-Express PHY with PIPE interface, 1 lane PCI-E PHY, UMC 0.18um GII Logic (RVT) process.
- PCIe Gen1
- UMC
- 180nm
- G
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PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.18um G2 process
Faraday Technology• HQ: TaiwanPCI-Express PHY with PIPE interface, 1 lane PCI-E PHY, UMC 0.18um GII Logic (RVT) process.
- PCIe Gen1
- UMC
- 180nm
- G
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Two Port Register File Compiler IP, UMC 90nm LL process
Faraday Technology• HQ: TaiwanUMC 90nm LL/RVT Synchronous high density Two Port Register File memory compiler.
- UMC
- 90nm
- LL
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Two Port Register File Compiler IP, UMC 65nm LL process
Faraday Technology• HQ: TaiwanUMC 65nm LL/RVT Low-K Logic process synchronous high density Two Port Register File SRAM memory compiler.
- UMC
- 65nm
- LL
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Two Port Register File Compiler IP, UMC 65nm SP process
Faraday Technology• HQ: TaiwanUMC 0.65um SP/RVT Low-K Logic process synchronous Two Port Register File memory compiler.
- UMC
- 65nm
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Two Port Register File Compiler IP, UMC 55nm SP process
Faraday Technology• HQ: TaiwanUMC 55nm SP Low-K Logic process synchronous Two Port Register File memory compiler.
- UMC
- 55nm
- SP
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Two Port Register File Compiler IP, UMC 55nm SP process
Faraday Technology• HQ: TaiwanUMC 55nm SP/RVT and HVT Low-K Logic process synchronous ultra high density/6T cell Two Port Register File memory compiler.
- UMC
- 55nm
- SP
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Two Port Register File Compiler IP, UMC 0.11um LL/AE process
Faraday Technology• HQ: TaiwanUMC 0.11um LL/AE (AL Enhancement) Logic process synchronous high density Two Port Register File SRAM memory compiler.
- UMC
- 110nm
- LL
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Single Port SRAM Compiler IP, UMC 90nm LL process
Faraday Technology• HQ: TaiwanUMC 90nm Logic process low leakage devices synchronous Low Power Single Port hihg density memory compiler.
- UMC
- 90nm
- LL