Standard Cell (Generic) Library IP, RVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (Generic Core).
- UMC
- 40nm
- LP
Standard cell libraries are fundamental building blocks for ASIC and SoC design, providing a set of pre-characterized logic cells used in digital circuit implementation.
These libraries include essential components such as logic gates, flip-flops, latches, and buffers, enabling efficient synthesis and physical design flows.
This catalog allows you to compare standard cell libraries from leading vendors based on performance, power consumption, area, and process node compatibility.
Whether you are targeting high-performance computing, low-power mobile designs, or cost-sensitive applications, you can find the right standard cell library for your project.
Standard Cell (Generic) Library IP, RVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (Generic Core).
Standard Cell (Generic) Library IP, LVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 9-Track Standard Cell Library (C50 Generic Core).
Standard Cell (Generic) Library IP, LVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 9-Track Standard Generic Core Cell Library.
Standard Cell (Generic) Library IP, HVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Logic process 9-Track Standard Cell Library (C50 Generic Core).
Standard Cell (Generic) Library IP, HVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Logic process 9-Track Standard Cell Library (Generic Core).
Standard Cell (Generic) Library IP, RVT, 12 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic process 12-Track Standard Generic Core Cell Library (C38).
Standard Cell (Generic) Library IP, RVT, 12 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 12-Track Standard Cell Library (C35).
Standard Cell (Generic) Library IP, LVT, 12 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic process 12-Track Standard Generic Core Cell Library (C38).
Standard Cell (Generic) Library IP, LVT, 12 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/LVT process 12-Track Standard Generic Core Cell Library (C35).
Standard Cell (Generic) Library IP, HVT, 12 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic process 12-Track Standard Generic Core Cell Library (C38).
Standard Cell (Generic) Library IP, HVT, 12 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/HVT process 12-Track Standard Cell Library (C35).
Standard Cell (Generic) Library IP, RVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic process 9-Track Standard Generic Core Cell Library (C38).
Standard Cell (Generic) Library IP, RVT, 9 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 9-Track Standard Generic Core Cell Library (C35).
Standard Cell (Generic) Library IP, UMC 0.18um CIS process
UMC 0.18um 3.3V CMOS Image Sensor process Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.18um CIS process
UMC 0.18um CMOS Image Sensor process1.8V Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um CIS process
UMC 0.13um CMOS Image Sensor Cu process Generic Cell Library.
Standard Cell (Generic) Library IP, 8 tracks, UMC 0.11um eFlash/LL process
UMC 0.11um eFlash/LL process 8-Track Cell Library.
Standard Cell (Generic) Library IP, 8 tracks, UMC 0.11um eFlash/HS process
UMC 0.11um eFlash(HS) 8-Track Generic Core Cell Library.
Standard Cell (Generic) Library IP, RVT, UMC 40nm LP process
UMC 40nm LP/RVT Low-K Logic process 2.5V OD 3.3V device RTC Generic Core Cell Library.
Standard Cell (Generic) Library IP, RTC Cell, UMC 0.11um eFlash process
UMC 0.11um eFlash/EE2PROM process RTC Library.