Standard Cell (Generic) Library IP, UMC 0.25um process
UMC 0.25um Logic process standard Cell Library.
- UMC
- 250nm
Standard cell libraries are fundamental building blocks for ASIC and SoC design, providing a set of pre-characterized logic cells used in digital circuit implementation.
These libraries include essential components such as logic gates, flip-flops, latches, and buffers, enabling efficient synthesis and physical design flows.
This catalog allows you to compare standard cell libraries from leading vendors based on performance, power consumption, area, and process node compatibility.
Whether you are targeting high-performance computing, low-power mobile designs, or cost-sensitive applications, you can find the right standard cell library for your project.
Standard Cell (Generic) Library IP, UMC 0.25um process
UMC 0.25um Logic process standard Cell Library.
Standard Cell (Generic) Library IP, UMC 0.25um process
UMC 0.25um Logic process mask programmable cell array with body E Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.25um process
UMC 0.25um Logic process shrink (0.22um) mask programmable cell array with body A Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.18um MS process
UMC 0.18um Mixed-Mode / RFCMOS process standard Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.18um LL process
UMC 0.18um LL Logic process mask programmable cell array with body E Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.18um LL process
UMC 0.18um LL Logic process standard Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process standard Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process mask programmable cell array with body E Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.15um SP process
UMC 0.15um SP Logic process mask programmable cell array with body E Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um SP process
UMC 0.13um Logic high speed(FSG) process, Metal programmable(M3/M4/M5) cell array Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um SP process
UMC 0.13um SP/FSG Logic process mask programmable cell array with body E Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um LL/FSG process
UMC 0.13um LL Logic(FSG) process metal programmable (M3/M4/M5) cell array standard Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process mask programmable cell array with body E Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um LL process
UMC 0.13um LL process, standard Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um LL process
UMC 0.13um LL FSG process high density Generic Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process metal programmable (M3/M4/M5) cell array standard Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process mask programmable cell array with body E Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process high density Core Cell Library.
Standard Cell (Generic) Library IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process high performance Core Cell Library.