PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 28HPCP
This Peripheral Component Interconnect Express Gen3 PHY is compliant with PCIe 3.0 Base Specification with support of PIPE 4.3 in…
- TSMC
- 28nm
- HPC+
- Silicon Proven
PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 28HPCP
This Peripheral Component Interconnect Express Gen3 PHY is compliant with PCIe 3.0 Base Specification with support of PIPE 4.3 in…
TSMC CLN28HPC 28nm Spread Spectrum PLL - 150MHz-750MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
TSMC CLN28HPC 28nm Spread Spectrum PLL - 300MHz-1500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
TSMC CLN28HPC 28nm Spread Spectrum PLL - 600MHz-3000MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
TSMC CLN28HPC 28nm Multi Phase DLL - 175MHz-875MHz
The Multi Phase DLL is designed for high-speed interface applications.
TSMC CLN28HPC 28nm Multi Phase DLL - 350MHz-1750MHz
The Multi Phase DLL is designed for high-speed interface applications.
TSMC CLN28HPC 28nm Multi Phase DLL - 700MHz-3500MHz
The Multi Phase DLL is designed for high-speed interface applications.
TSMC CLN28HPC 28nm General Purpose PLL - 350MHz-1750MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
TSMC CLN28HPC 28nm Deskew PLL - 175MHz-875MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
TSMC CLN28HPC 28nm Deskew PLL - 350MHz-1750MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
TSMC CLN28HPC 28nm Deskew PLL - 700MHz-3500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
TSMC CLN28HPC 28nm DDR DLL - 150MHz-750MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN28HPC 28nm DDR DLL - 200MHz-1000MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN28HPC 28nm DDR DLL - 316MHz-1580MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN28HPC 28nm Clock Generator PLL - 175MHz-875MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN28HPC 28nm Clock Generator PLL - 350MHz-1750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN28HPC 28nm Clock Generator PLL - 700MHz-3500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
The nSAD_TS180_1V8_AD14b2M is a 14b 2MS/s, 13 ENOB, low-power SAR fully-differential AD converter designed on the TSMC 180 proces…
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 65/55LP
HDMI transmitter PHY (Physical layer) IP core which is fully compliant with HDMI 1.4 specification.
HDMI 1.3 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
HDMI transmitter PHY (Physical layer) IP core which is fully compliant with HDMI 1.3 specification.