Rad-hard 17-bit 3-channel sigma-delta ADC at 3.2kS/s
Pacific Microchip Corp.
- Tower
- 180nm
- SL
- Silicon Proven
Rad-hard 17-bit 3-channel sigma-delta ADC at 3.2kS/s
Pacific Microchip Corp.
The PMCC_VCO20G /24G /25G /26G /30G is a set of fully differential high speed VCOs covering 20GHz … 30GHz frequency range, design…
The PMCC_VCO20G /24G /25G /26G /30G is a set of fully differential high speed VCOs covering 20GHz … 30GHz frequency range, design…
The PMCC_VCO20G /24G /25G /26G /30G is a set of fully differential high speed VCOs covering 20GHz … 30GHz frequency range, design…
NVM OTP in Tower (180nm, 110nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in stand…
NVM FTP Trim in TowerJazz (180nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in stand…
17nA Current Bias with Enable Low Voltage (1.0V), Ultra Low Power (90nW @ 1.8V)
This macro-cell is a low power general purpose current bias generator core designed for TowerJazz 0.18µm TS18SL CMOS technology.
4MHz Low Power Oscillator - Low power (4.6µW), Internal Current Reference TowerJazz 0.18 um
This macro-cell is a general purpose, low power, 4MHz internal oscillator core designed for TowerJazz TS18SL 0.18μm CMOS technolo…
The PMCC_VCO20G /24G /25G /26G /30G is a set of fully differential high speed VCOs covering 20GHz … 30GHz frequency range, design…
The PMCC_VCO20G /24G /25G /26G /30G is a set of fully differential high speed VCOs covering 20GHz … 30GHz frequency range, design…
1MHz-50GHz Programmable Prescaler - Divider by 1/2/4/8/16 in SiGe
The PMCC_DIV50G1_16 is a high speed (up to 50GHz) fully differential programmable divider IP block, designed using Jazz SiGe120 (…
Up to 60GHz Divide By 2 Prescaler with I and Q outputs in GiGe
The PMCC_DIV60G is a high speed (up to 60GHz) fully differential static frequency divider by 2, designed using Jazz SiGe120 (SBC1…
14-bit 12.5MSPS SAR ADC - Tower 65nm
The A14B12p5M is a high-performance, low-power analog-to-digital converter (ADC) intellectual property (IP) block designed for ap…
10-bit Pipeline ADC - Tower 180 nm
The A10B25M is an ultra low-power, high-performance analog to digital converter (ADC) intellectual property (IP) design block.
The ATO00512X8TJ180SBC4NA is organized as 512 bits by 8 one-time programmable in 8-bit read and 1-bit program modes.
Embedded MTP (Multi-Time Programmable) IP, 8Kx32 bits for 1.8V/5V PM
NeoMTP is a single-poly embedded memory technology offering high NVM memory density with 1K endurance at the lowest implementatio…
NVM FTP Trim TowerJazz 180nm SL 3.3V
The Synopsys Few Time Programmable (FTP) Trim Non-Volatile Memory (NVM) IP provides the capability of reprogrammable NVM in a sta…
LogicFlash® Embedded MTP in Tower 180nm
LogicFlash® MTP?????CMOS???????????????,????????,??????????,?????1?????,??IP??,???1KB~64KB???????,??????2????????
LVDS transmitter - TowerJazz 0.13um
LVDS transmitter
LVDS receiver - TowerJazz 0.13um
LVDS receiver