Standard Cell Libraries GF 55nm
The Standard Cell libraries deliver thousands of optimized cells with each one being optimized for power, area, speed, routing, a…
512x8 Bits OTP (One-Time Programmable) IP, GLOBALFOUNDRIES 0.13um BCD 1.5V/5V Process
The ATO00512X8GF130BCD3NA is organized as a 512-bits by 8 one-time programmable in parallel mode.
GF L28SLPE 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a architecture using high-speed digital and analog circuits that offers exceptional performance, f…
GF L28SLPE 28nm Spread Spectrum PLL - 96MHz-481MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
GF L28SLPE 28nm Spread Spectrum PLL - 192MHz-962MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
GF L28SLPE 28nm Spread Spectrum PLL - 384MHz-1920MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
GF L28SLPE 28nm Multi Phase DLL - 110MHz-550MHz
The Multi Phase DLL is designed for high-speed interface applications.
GF L28SLPE 28nm Multi Phase DLL - 220MHz-1100MHz
The Multi Phase DLL is designed for high-speed interface applications.
GF L28SLPE 28nm Multi Phase DLL - 440MHz-2200MHz
The Multi Phase DLL is designed for high-speed interface applications.
GF L28SLPE 28nm IoT PLL - 30MHz-550MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power.
GF L28SLPE 28nm General Purpose PLL - 220MHz-1100MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
GF L28SLPE 28nm Deskew PLL - 110MHz-550MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
GF L28SLPE 28nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
GF L28SLPE 28nm Deskew PLL - 440MHz-2200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
GF L28SLPE 28nm DDR DLL - 117MHz-585MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
GF L28SLPE 28nm DDR DLL - 156MHz-780MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
GF L28SLPE 28nm DDR DLL - 246MHz-1230MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
GF L28SLPE 28nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L28SLPE 28nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L28SLPE 28nm Clock Generator PLL - 440MHz-2200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.