What is ULP 10MHz Clock-Generator - GLOBALFOUNDRIES 22FDX?
ULP 10MHz Clock-Generator - GLOBALFOUNDRIES 22FDX is a Clock Generator IP core from Racyics GmbH listed on Semi IP Hub. It is listed with support for globalfoundries.
Vendor:
Racyics GmbH
Category:
Clock Generator
ULP 10MHz Clock-Generator - GLOBALFOUNDRIES 22FDX
Ultra-low power 10 MHz dock multiplier from a low frequency reference.
Overview
Ultra-low power 10 MHz dock multiplier from a low frequency reference.
The Racyics® clock generator is designed to generate a 10 MHz clock from a low-frequency reference with as little power and area overhead as possible.
For highest flexibility, a wide range of reference frequencies is supported. The generated clock can be fed to the Racyics® ABX® generator.
SPECIFICATION
- Supply Voltages [V]: 0.80
- ZBB (Zero Bias): yes
Key features
- The All Digital Frequency Locked Loop (ADFLL) architecture is reduced to the minimum amount of hardware necessary to generate a 10 MHz clock
- High energy efficiency: Only 5 μW are consumed during operation
- A reference clock divider allows reference clock frequencies from 32 kHz to 1 MHz
Block Diagram
ri_gf22fdx_clkgen_10m block diagram
What’s Included?
- Verilog simulation models
- .lib/.db timing and power models (NLDM)
- .lef layout abstract views
- NDM and Milkyway libraries
- GDSII files
- LVS netlist
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| GlobalFoundries | 22nm | FDX | — |
Specifications
Identity
Part Number
ri_gf22fdx_clkgen_10m
Vendor
Racyics GmbH
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Germany
Frequently asked questions about Clock Generator IP cores
How should engineers evaluate this Clock Generator?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Clock Generator IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.