Overview
eMMC 5.1 Nex Bus Driver is a production-ready software stack for eMMC 5.1 Host Controller IP that is used to connect eMMC devices. The eMMC 5.1 stacks can also be used for validating a device during its development and integration life cycles thereby helping designers to reduce the time to market for their product. The modular neX+ stack is architected to be OS and platform independent which eases porting effort. It has thin OS and hardware abstraction layers making it highly portable. The neX+ stack provides a generic API set to access, control and configure the bus driver, host controller driver, and the underlying hardware.
The eMMC 5.1 software stack includes functions for initialization, sending of commands, data transfer, power management, bus configuration, client driver matching, host controller hardware configuration, and shutdown. The neX+ stack can support a single host controller with multiple slots or multiple host controllers with multiple slots. The software stack complies with the latest eMMC standards. It supports eMMC cards with the option for a device to boot directly from these cards using the boot mode feature.
Learn more about SD / eMMC Controller IP core
UniversalFlash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniPro as well as eMMC form factors to simplify adoption and development.
Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniProSM as well as eMMC form factors to simplify adoption and development.
We are living in an age where we generate the same amount of data each year that has been generated since antiquity. Ever wondered how and where these peta /exa/zetta bytes of data are stored?
In this paper we will see how the flash memories developed using Carbon Model Studio helps to bring up an ARM® Cortex A7 flash memory sub-system with primary and secondary boot codes. Flash memories system demonstrated here can be used for early boot code and driver development for any CPU based SoC.
In this article, a new way to implement high performance data storage is presented, allowing the use of server-class storage technology in an embedded environment.
