One Port Register File Compiler IP, UMC 0.11um LL process
UMC 0.11um LL/FSG process synchronous Single Port Register File SRAM memory compiler.
- UMC
- 110nm
- LL
Embedded memory IP cores are fundamental components in modern SoC and ASIC designs, providing fast and efficient on-chip data storage for processors, accelerators, and peripherals.
These IP cores encompass a broad range of volatile and non-volatile memory technologies, including SRAM for high-speed data storage, ROM for fixed program and boot code storage, register files for processor and accelerator architectures, as well as EEPROM, eFuse/OTP, and MTP (Multiple-Time Programmable) memories for configuration data, security credentials, device calibration, and permanent system information.
This catalog allows you to compare embedded memory IP cores from leading vendors based on density, access time, power consumption, and process node compatibility.
Whether you are designing high-performance processors, AI accelerators, automotive systems, or IoT devices, you can find the right embedded memory IP for your design.
One Port Register File Compiler IP, UMC 0.11um LL process
UMC 0.11um LL/FSG process synchronous Single Port Register File SRAM memory compiler.
One Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS Logic process synchronous Single Port Register File memory compiler.
One Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS/FSG Logic process, One Port Register File memory compiler.
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Enhancement) Logic process synchronous high density Single Port Register File SRAM memory compiler.
UMC 55um LP Low-K process One Port Register File compiler.
Dual Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT/ Low-K process synchronous Dual Port SRAM compiler.
Dual Port SRAM Compiler IP, UMC 55nm LP process
UMC 55nm LP/ Low-K process with row Redundancy Dual Port SRAM compiler.
Dual Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55nm eHV process, Dual Port SRAM compiler.
Dual Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process, Dual Port SRAM compiler with R1.
Dual Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process, Dual Port SRAM compiler with LVT.
Dual Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/ Low-K Dual Port SRAM compiler.
Dual Port SRAM Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous high density Dual Port (2RW) SRAM memory compiler.
Dual Port SRAM Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous high density Dual Port (2RW) SRAM memory compiler.
Dual Port SRAM Compiler IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density synchronous high density Dual Port (2RW) SRAM memory compiler.
Dual Port SRAM Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process Synchronous high density Dual Port SRAM memory compiler with input wrapper Mux.
Dual Port SRAM Compiler IP, UMC 0.11um SP process
UMC 0.11um SP/AE (AL Advance Enhancement) Logic process synchronous High-density Dual Port SRAM memory compiler.
Dual Port SRAM Compiler IP, UMC 0.11um LL process
UMC 0.11um low leakage Logic process synchronous high density Dual Port SRAM memory compiler.
Dual Port SRAM Compiler IP, UMC 0.11um eFlash/LL process
UMC 0.11um eFlash LL process Dual Port SRAM compiler.
Dual Port SRAM Compiler IP, UMC 0.11um eFlash/HS process
UMC 0.11um eFlash HS process, Dual Port SRAM compiler.
Dual Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55nm eHV process, Dual Port SRAM compiler with row redundancy option.