A design path to success exists for ultra-low-voltage SoCs
The alien realm of ultra-low voltage (ULV) in chip design means supply voltages near or below transistor threshold voltages.
Vendor:
Faraday Technology
Category:
DLL
DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Enhancement) Logic Process
Overview
DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| UMC | 110nm | HS | Pre-Silicon |
Specifications
Identity
Part Number
FXDLL208HR0B
Vendor
Faraday Technology
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Taiwan
Learn more about DLL IP core
Faraday Reports Second Quarter 2026 Results
Second quarter consolidated revenues were NT$3,314 million, up 28% QoQ but down 27% YoY.
Crypto mining SoC unearths a need for custom IP
Would custom memory ease your SoC design?
A case study shows how custom memory design can adapt to functional, timing, or layout requirements of a particular SoC.
Faraday Reports First Quarter 2026 Results
First quarter consolidated revenues were NT$2,589 million, down 8% QoQ and 65% YoY. Gross profit was NT$1,225 million, up 3% QoQ but down 19% YoY, with gross margin reached 47.3%.
Faraday Delivers IP Solutions to Enable Endpoint AI Based on UMC’s 28nm SST eFlash
The comprehensive IP solution integrates SST eFlash controller and BIST, together with silicon-proven analog and high-speed interface PHY IPs, providing a stable and production-ready foundation for low-power, high-performance endpoint AI designs.
Frequently asked questions about DLL IP cores
What is DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process?
DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process is a DLL IP core from Faraday Technology listed on Semi IP Hub. It is listed with support for umc Pre-Silicon.
How should engineers evaluate this DLL?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DLL IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.