The Platform Based SOC Design that Utilizes Structured ASIC Technology
The Platform Based SOC Design that Utilizes Structured ASIC Technology
Vendor:
Faraday Technology
Category:
DLL
DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Enhancement) Logic Process
Overview
DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| UMC | 110nm | HS | Pre-Silicon |
Specifications
Identity
Part Number
FXDLL208HR0B
Vendor
Faraday Technology
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Taiwan
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Frequently asked questions about DLL IP cores
What is DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process?
DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process is a DLL IP core from Faraday Technology listed on Semi IP Hub. It is listed with support for umc Pre-Silicon.
How should engineers evaluate this DLL?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DLL IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.