VeriSilicon Introduces GLTiny™ 3D GPU Programming Model for Ultra-Low-Power, Memory-Efficient Wearable Devices
Optimized GLTiny Model Brings Rich 3D Graphics to Resource-Constrained Wearable Devices Powered by OpenGL ES GPUs
This IP is a programmable Analog PLL suitable for high speed clock generation.
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| IBM | 65nm | LPe | Silicon Proven |
IBM10SF 1.0v/2.5v APLL is a PLL IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for ibm Silicon Proven.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.