Vendor: Synopsys, Inc. Category: CCIX

Configurable CCIX controllers for CCIX 25G supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications

Synopsys’ CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 32GT/s and suppo…

Overview

Synopsys’ complete CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 32GT/s and supports cache coherency for high-performance cloud computing applications. The Cache Coherent Interconnect for Accelerators (CCIX) standard was created to enable hardware accelerators and processors to maintain cache coherency across shared memory in a heterogeneous multi-processor system, and leverage PCI Express 5.0 line rates up to 32GT/s.
The CCIX IP is built on the silicon-proven Synopsys IP for PCI Express, which has been validated in over 1800 designs and shipped in billions of units, enabling designers to lower integration risk while accelerating adoption of the CCIX standard. Synopsys is a contributing member of the CCIX Consortium.

Key features

  • Supports all required features of the CCIX 1.1 specification, including 32GT/s, and ESM support for 25GT/s and 20GT/s
  • Supports all required features of the PCI Express 5.0, 4.0, 3.1, 2.1 and 1.1 specifications
  • Supports up to sixteen 32.0 25.0, 16.0, 8.0, 5.0, 2.5 GT/s lanes
  • Available in 128-, 256- or 512-bit datapath widths for maximum flexibility
  • Supports PHYs with 8-, 16-, or 32-bit interfaces including variable clock and variable data modes
  • Full transaction layer, data link layer and physical layer
  • Application interfaces include the time-proven Synopsys native interface with extensions for CCIX, or the optional ARM® AMBA® 4 AXI, or AMBA 3 AXI application interface with extensions for CCIX
  • Includes CCIX Transport DVSEC configuration space
  • Optional embedded DMA controller with up to 8 read and 8 write channels for high throughput with minimal SoC resource overhead
  • Configurable and efficient retry buffer design for low latency and area
  • Supports automatic lane reversal and polarity inversion
  • Supports the full range of maximum packet sizes (128B to 4KB) and read request sizes (128B to 4KB)
  • Performs flow-control credit management, configurable for infinite credits for any traffic type
  • Supports legacy INTx, MSI, and MSI-X interrupt semantics
  • Configurable filtering rules for posted, non-posted and completion traffic
  • Configurable BAR (up to 6) filtering, IO filtering, configuration filtering and completion lookup/timeout
  • Support for multiple application clients
  • In-band and out-of-band access to configuration space registers and external user application registers with local bus controller
  • Expansion ROM, VPD, and Device Serial Number support
  • Supports optional ECNs

Benefits

  • Solution consists of digital controller, PHY and verification IP
  • Supports all required features of the CCIX
  • specification, including 32GT/s, and ESM support for 25GT/s and 20GT/s with targeted process ports at 16-nm and smaller
  • Supports all required features of the PCIe
  • 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s),
  • 2.1 (5 GT/s) and 1.1 (2.5 GT/s), and 8-, 16-, or 32-bit PIPE specifications
  • Controller provides reliability, availability, and serviceability (RAS) features, in addition to debug capabilities, error injection and statistics monitoring
  • Low-power, compact PHY optimizes performance across voltage and temperature variations, and delivers superior signal integrity and jitter performance
  • Verification IP offers configurable environments, complete port level checks and system-wide coherency checks

Applications

  • Enterprise computing, storage area networks, SSD, switches, networking, routers, processors
  • Computational accelerators, artificial intelligence, deep learning
  • Graphics devices
  • Desktops, laptops, workstations, and servers

What’s Included?

  • The coreConsultant utility to guide designers through the installation configuration, architectural exploration, verification, and implementation of the IP
  • Verilog RTL code
  • Example PHY interfaces
  • ASIC and FPGA synthesis scripts
  • Verification environment
  • Synopsys Verification IP for the PCI Express
  • Documentation: release notes, installation/integration guide, application notes, user manual

Specifications

Identity

Part Number
dwc_ccix_25g_prem_contoller
Vendor
Synopsys, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Synopsys, Inc.
HQ: USA

Learn more about CCIX IP core

Frequently asked questions about CCIX IP cores

What is Configurable CCIX controllers for CCIX 25G supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications?

Configurable CCIX controllers for CCIX 25G supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications is a CCIX IP core from Synopsys, Inc. listed on Semi IP Hub.

How should engineers evaluate this CCIX?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CCIX IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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