Vendor: SmartDV Category: Test / Debug

Compact Flash Verification IP

CF Verification IP provides an smart way to verify the Compact Flash operations.

Verification IP View all specifications

Overview

CF Verification IP provides an smart way to verify the Compact Flash operations. The SmartDV's CF Verification IP is fully compliant with revision 1.0/2.0/3.0 and 4.0 of the CF Specification and provides the following features.

Compact Flash Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

Compact Flash Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Supports Compact Flash Specs 1.0/2.0/3.0 and 4.0.
  • Supports all the 3 basic modes of CF Card,
    • PC Card ATA using I/O Mode.
    • PC Card ATA using Memory Mode.
    • True IDE Mode.
  • Supports all CF-ATA Commands.
  • Supports Security Mode Feature set.
  • Supports Power Down Commands and Sleep mode.
  • Supports Ultra DMA Mode.
  • Supports CF-ATA Registers.
  • Supports for CRC for UDMA Operations.
  • Supports the below timing specifications like,
    • Attribute Memory Read Timing Specification
    • Configuration Register (Attribute Memory) Write Timing Specification
    • Common Memory Read Timing Specification
    • Common Memory Write Timing Specification
    • I/O Input (Read) Timing Specification
    • I/O Output (Write) Timing Specification
    • True IDE PIO Mode Read/Write Timing Specification
    • True IDE Multiword DMA Mode Read/Write Timing Specification
    • Ultra DMA Mode Read/Write Timing Specification
  • Supports Host and Device Initiating, Terminating, Pausing, Sustaining Ultra DMA Mode Data In/Out Burst.
  • Supports Memory Space Decoding.
  • Supports UDMA Functions.
  • Supports Attribute Memory Functions.
  • Supports I/O Transfer Functions.
  • Supports True IDE Mode I/O Transfer Functions.
  • Supports Metaformat functions.
  • Protocol Checker fully compliant with CF Specifications.
  • Monitors, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations
  • Built in functional coverage analysis.
  • Supports Callbacks, so that user can access the data observed by monitor.
  • Compact Flash Verification IP comes with complete test suite to test every feature of CF specification.

Block Diagram

Compact Flash VIP block diagram

Benefits

  • Faster testbench development and more complete verification of CF designs.
  • Easy to use command interface simplifies testbench control and configuration of Card and Host.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the CF testcases.
  • Examples showing how to connect various components, and usage of BFM and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Specifications

Identity

Part Number
Compact Flash VIP
Vendor
SmartDV
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV
HQ: India

Learn more about Test / Debug IP core

Keeping Pace with CXL Specification Revisions

As the Compute Express Link® (CXL®) specification rapidly evolves, so too must the tools and infrastructure used to verify designs built around it. Maintaining verification IP (VIP) that keeps pace with new specification revisions is no small task, particularly when dealing with major version shifts like the transition from CXL 2.0 to 3.0.

SmartDV Licenses SDIO IP Family to Ranix for V2X Products

To meet RANiX’s unique design goals, SmartDV will customize the IP to go beyond the standard SDIO functionality—thereby empowering RANiX to differentiate from their competitors. SmartDV will also provide RANiX with the requisite support and documentation to achieve ASIL certification for ISO 26262.

SmartDV Rolls Out Multi-Phase Expansion Plan

SmartDV™ Technologies, provider of flexible, customizable semiconductor design IP (intellectual property) and verification solutions, has expanded engineering operations beyond its headquarters in Bengaluru with the opening of a new office space in Coimbatore, Tamil Nadu, India.

Frequently asked questions about SerDes Test / Debug IP cores

What is Compact Flash Verification IP?

Compact Flash Verification IP is a Test / Debug IP core from SmartDV listed on Semi IP Hub.

How should engineers evaluate this Test / Debug?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Test / Debug IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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