Learn more about Modulation Demodulation IP core
Global IP Core rolled out the Zigbee Transceiver PHY IP Core for instant implementation. The IP Core is available for the Satellite Communication and Aerospace & Defense industry. The modulation and spreading functions for the O-QPSK PHYs are processed through 3 steps. First, each 4 bits are gathered to represent 1 symbol, which has a value from 0 to 15
Global IP Core Sales - The DVB-S2X LDPC Decoder is a powerful FEC core decoder for Digital Video Broadcasting via Satellite. It implements extensions to the DVB-S2X design for better performance and efficiency as well as robust service availability.
The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the input message in order to form the encoded codeword.
In Digital video broadcasting for cable systems systems, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Density Parity Check) codes concatenated with BCH (Bose Chaudhuri Hocquenghem) codes, allowing Quasi Error Free operation close to the Shannon limit.
The Forward Error Correction (FEC) sub-system is one of the essential basing blocks in any communication systems so a powerful FEC code is needed. The New Radio (NR) FEC for the control channel is proposed to be designed based on Polar codes allowing close to the Shannon limit/Capacity operation.
The demodulator is designed to be used together with a cable tuner and an analog to digital converter (ADC). The system has an internal state machine to control the operation, which can be externally configured via the SPI interface.
