Global IP Core Launches Licensable Zigbee Transceiver PHY IP Core
August 5, 2026 – Global IP Core rolled out the Zigbee Transceiver PHY IP Core for instant implementation. The IP Core is available for the Satellite Communication and Aerospace & Defense industry. The modulation and spreading functions for the O-QPSK PHYs are processed through 3 steps. First, each 4 bits are gathered to represent 1 symbol, which has a value from 0 to 15. Second, each symbol is used to select among 16 PN sequences called chip. Finally, each chip is modulated using O-QPSK with half-sine pulse shaping. Once a preamble is detected, the Start of Frame Delimiter (SFD), frame length, and other receiver status information is sent to the upper layer. Additionally, the payload data is written to the received data buffer to create the PSDU packet, which is transferred to the MAC layer when requested. The PHY notifies the MAC layer for arrival of MAC Protocol Data Unit (MPDU) along with the LQI information via an interrupt. If a valid preamble is not detected, it gives feedback to the packet time error detection block to restart the energy detection process. The design includes ED and LQI circuits to support CCA modes by MAC defined in IEEE 802.15.4.
Key Features and Performance:
- Low power transceiver PHY IP for Zigbee applications, compliant with IEEE 802.15.4 standard
- Efficient demodulator with frame synchronization and frequency offset compensation
- Supports 2 MHz IF input (reconfigurable on request)
- Offset-QPSK (OQPSK)
- Chip rate: 2000 kchips/sec
- Bit rate: 250 kbits/sec
- Symbol rate: 62.5 ksymbols/sec
- Spreading sequence: 16-ary orthogonal
- Support a carrier frequency offset (CFO) up to 250 KHz
- Sampling frequency: 8 MHz (reconfigurable upon request)
- Uses single-bit limiter (8-bit ADC version available upon request)
- AHB-Lite bus interface (other interfaces available upon request)
Applications:
- Home Automation
- Healthcare
- Smart Energy
- Smart metering Utility Network (SUN)
IP Core Deliverables:
- Synthesizable Verilog
- System Model (Matlab) and documentation
- Verilog Test Benches
- Documentation
Please contact us for more information at info@global-ipc.com or check out our product portfolio at www.global ipc.com
Explore Global IP Core IP:
- DVB-S2X Wideband LDPC/ BCH Encoder
- IEEE802.11n/ac/ax Wi-Fi LDPC Decoder and Encoder
- DVB-S2X Wideband LDPC/ BCH Decoder
- NR-5G Polar Decoder and Encoder
About Global IP Core Sales:
Global IP Core Sales® was founded in 2021 and provides state-of-the-art IP Cores for the Semiconductor market. The majority of our products are silicon proven and can be seamlessly implemented into FPGA and ASIC technologies. Global IP Core Sales® will assist you with your IP Core and integration needs. Our mission is to grow your bottom line.
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- Flash Memory LDPC Decoder IP Core
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