CCSDS 131.2 Wideband Modulator

The CCSDS high performance modulator performs all tasks of an inner transmitter. The modulator expects SCCC (Serial Concatenated Convolutional Code) encoded frames as input and performs mapping, PhysicalLayer (PL) framing and modulation. In addition, the core performs baseband interpolation and output gain adjustment. The output of the core is designed to be followed by a DAC and RF front end.

• Compliant with CCSDS 131.2-B-1
• Supports ACM mode
• Supports roll-off factors 5%, 10%, 15%, 20%, 25% to 35%
• Support for blocks with pilots only
• Support for QPSK to 64-APSK

• Easy-to-use mode adaptation input interface
• Provides interpolated and gain-adjusted ZF baseband signal
• The modulator contains bit mapping, PL signaling, pilot insertion, PL scrambling, interpolation, baseband filtering and gain adjustment
• Low-power and low-complexity design
• Memory-mapped interface for controlling and for retrieving status information
• Flexible output interface, which can be driven by an external clock for easy synchronization with DAC
• AXI4-Stream handshaking interfaces for seamless integration
• Perfectly fits to the Creonic CCSDS SCCC Turbo Encoder
• Available for ASIC and FPGAs (AMD Xilinx, Intel, Microchip)

• Satellite communication
  • High data rate telemetry
  • applications
  • Earth Exploration Satellite
  • Service (EESS)
• Applications with the highest
• demands on forward error correction
• Applications with the need for a wide
• range of code rates and block lengths

• VHDL source code or synthesized netlist
• HDL simulation models
• Bit-accurate Matlab, C or C++ simulation model
• Comprehensive documentation