CAN Controller Core with 32/32 Message Objects

CANmodule-IIIx is a full functional CAN controller module that supports the concept of mailboxes. It is compliant to the international CAN standard defined in ISO 11898-1.

It contains 32 receive buffers, each one with its own message filter, and 32 transmit buffers with prioritized arbitration scheme. For optimal support of Higher Layer Protocols (HLP) such as DeviceNet or SDC, the message filter covers the first two data bytes as well.

The design is written in technology independent HDL and can be mapped to ASIC and FPGA architectures and makes use of on-chip SRAM structures. An AMBA 3 Advanced Peripheral Bus (APB) interface enables smooth integration into ARM based SOC’s. This full synchronous bus interface can easily be connect to other system buses.

• Standard Compliant
  • Full CAN 2.0A/B compliant
  • Conforms to ISO 11898-1
  • Tested according to ISO 16845
  • Maximum baudrate of 1 Mbps with 8 MHz system clock
• Receive Path
  • 32 receive buffers
  • Each buffer has its own message filter
  • Message filter covers: ID, IDE, RTR, Data byte 1 and Data byte 2
  • Message buffers can be linked together to build a bigger message array
  • Automatic remote transmission request (RTR) response handler with optional generation of RTR interrupt
• Transmit Path
  • 32 Tx message holding registers with programmable priority arbitration
  • Message abort command
  • Single-shot transmission (no automatic retransmission upon error or arbitration loss)
• System Bus Interface
  • AMBA 3 Advanced Peripheral Bus (APB) Interface
  • Optional: AMBA Advanced High-performance (AHB) Interface
  • Full synchronous zero wait-states interface
  • Status and configuration interface
• Programmable Interrupt Controller
  • Local interrupt controller covering message and CAN error sources
• Test and Debugging Support
  • Listen only mode
  • Internal loopback mode
  • External loopback mode
  • SRAM test mode
  • Error capture register
    • Provides option to either
      • o show current bit position within CAN message
      • o show bit position and type of last captured CAN error
    • SRAM Based Message Buffers
      • Optimized for low gate-count implementation
      • Single port, synchronous memory based
      • 100% Synchronous Design

• CAN networks can be used as an embedded communication system for microcontrollers as well as an open communication system for intelligent devices. The CAN serial bus system, originally developed for use in automobiles, is increasingly being used in industrial field bus systems, the similarities are remarkable. In both cases some of the major requirements are:
  • low cost,
  • the ability to function in a difficult electrical environment,
  • a high degree of realtime capability and
  • ease of use.
• Application Specific Message Filters
  • We provide application specific message filters. Whether you need a DMA controller interface, special filter capabilities or message FIFOs with priority encoding we are happy to provide you with a one-stop shopping solution.

• Verilog RTL Source Code
• Verification Suite
  • Functional Testbench including CANbus transceiver model and additional CAN nodes
• Synthesis Script
• Data Sheet
• User Guide
• Hotline Support by means of phone, fax and e-mail