Overview
The CAN XL IP presents a revolutionary advancement bridging the gap between CAN FD and 100Mbit Ethernet, making strides in data transmission technology. With support for data rates reaching up to 20 Mbit/s and accommodating data fields up to 2048 bytes in length, it surpasses previous standards. Moreover, it offers the flexibility of employing higher layer protocols and Ethernet frame tunneling, enhancing its versatility in various applications.
Retaining the reliability and advantages of the CAN protocol, this solution ensures seamless integration while catering to evolving technological needs. Backward compatibility with Classical CAN, CAN FD, and CAN XL further solidifies its adaptability. For physical connectivity to the CAN bus, external transceiver hardware is essential, with CAN transceivers for bitrates below 10Mbps and CAN SIC XL transceivers for bitrates exceeding 10Mbps.
Notably, the CAN XL implementation from DCD incorporates a single or dual-ported Message RAM located externally, facilitating efficient message handling through the Generic Master Interface. Integration with the host CPU is effortless through the 32-bit Generic Interface, compatible with popular interface wrappers such as AMBA, Altera Avalon Bus, and Xilinx OPB Bus.
This advanced solution is available in two versions, Basic and Safety-Enhanced, with the latter developed as an ISO26262-10 Safety Element out of Context. It can be further enhanced with necessary safety mechanisms, accompanied by comprehensive safety documentation meeting ISO26262 standards. Third-party audits validate the safety-related work products, ensuring compliance with Automotive Safety Integrity Level ASIL-B requirements.
The thorough FMEDA analysis provided by DCD offers step-by-step instructions for seamless integration and system-level safety analysis. Achieving ASIL-B readiness, this design is suitable for integration into Automotive Safety Systems, with the option for higher ASIL level readiness. For additional details and optional features, customers are encouraged to reach out to DCD support.
Learn more about CAN / CAN-FD / CAN-XL IP core
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