Vendor: SmartDV Category: Protocol Bridge

AMBA AXI4-Stream Verification IP

AMBA AXI4-Stream Verification IP provides an smart way to verify the ARM AMBA AXI4-Stream component of a SOC or a ASIC.

Verification IP View all specifications

Overview

AMBA AXI4-Stream Verification IP provides an smart way to verify the ARM AMBA AXI4-Stream component of a SOC or a ASIC. The SmartDV's AMBA AXI4-Stream Verification IP is fully compliant with standard AMBA AXI4-Stream Specification.

AMBA AXI4-Stream Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

AMBA AXI4-Stream Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Compliant with the latest ARM AMBA AXI4-Stream Protocol Specification.
  • Supports AXI4-Stream Master, Slave, Monitor and Checker.
  • Supports all ARM AMBA AXI4-Stream data widths.
  • Support for all Data streams including Byte stream, Continuous aligned stream, Continuous unaligned stream and Sparse stream.
  • Support for single byte, packet and frame transfers.
  • Transfer interleaving support.
  • Support for upsizing, downsizing and merging.
  • Supports constrained randomization of protocol attributes.
  • Slave supports fine grain control of response.
  • Programmable wait states or delay insertion.
  • Ability to inject errors during transfer.
  • Ability to configure the width of all signals.
  • Support for bus inactivity detection and timeout.
  • Programmable Timeout insertion.
  • Supports FIFO memory.
  • Rich set of configuration parameters to control AXI4-Stream functionality.
  • On-the-fly protocol and data checking.
  • Notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
  • Built in coverage analysis.
  • Callbacks in Master, Slave and Monitor for various events.
  • Status counters for various events on bus.
  • AXI4-Stream Verification IP comes with complete testsuite to test every feature of ARM AMBA AXI4-Stream specification.

Block Diagram

AMBA AXI4-Stream VIP block diagram

Benefits

  • Faster testbench development and more complete verification of ARM AMBA AXI4-Stream designs.
  • Easy to use command interface simplifies testbench control and configuration of Master and Slave.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the AMBA AXI4-Stream testcases.
  • Examples showing how to connect various components, and usage of BFM and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Specifications

Identity

Part Number
AMBA AXI4-Stream VIP
Vendor
SmartDV
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV
HQ: India

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Frequently asked questions about Protocol Bridge IP cores

What is AMBA AXI4-Stream Verification IP?

AMBA AXI4-Stream Verification IP is a Protocol Bridge IP core from SmartDV listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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