Vendor: SmartDV Category: Protocol Bridge

AMBA AXI4-Stream Assertion IP

AMBA AXI4-Stream Assertion IP provides an smart way to verify the ARM AMBA AXI4-Stream component of a SOC or a ASIC.

Overview

AMBA AXI4-Stream Assertion IP provides an smart way to verify the ARM AMBA AXI4-Stream component of a SOC or a ASIC. The SmartDV's AMBA AXI4-Stream Assertion IP is fully compliant with standard AMBA AXI4-Stream Specification and provides the following features.

AMBA AXI4-Stream Assertion IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

AMBA AXI4-Stream Assertion IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Specification Compliance
    • Compliant with the latest ARM AMBA AXI4-Stream Protocol Specification.
    • Supports all AXI4-Stream data widths.
    • Support for all Data streams including Byte stream, Continuous aligned stream, Continuous unaligned stream and Sparse stream.
    • Support for single byte, packet and frame transfers.
    • Transfer interleaving support.
    • Ability to configure the width of all signals.
    • Support for bus inactivity detection and timeout
  • Assertion IP features
    • Assertion IP includes:
    • System Verilog assertions
    • System Verilog assumptions
    • System Verilog cover properties
    • Synthesizable Verilog Auxiliary code
    • Support Master mode, Slave mode, Monitor mode and Constraint mode.
    • Supports Simulation mode (stimulus from SmartDV AXI4-Stream VIP) and Formal mode (stimulus from Formal tool).
    • Rich set of parameters to configure AXI4-Stream Assertion IP functionality.

Block Diagram

AMBA AXI4-Stream AIP block diagram

Benefits

  • Runs in every major formal and simulation environment.

What’s Included?

  • Detailed documentation of Assertion IP usage.
  • Documentation also contains User's Guide and Release notes.

Specifications

Identity

Part Number
AMBA AXI4-Stream AIP
Vendor
SmartDV
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV
HQ: India

Learn more about Protocol Bridge IP core

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As the Compute Express Link® (CXL®) specification rapidly evolves, so too must the tools and infrastructure used to verify designs built around it. Maintaining verification IP (VIP) that keeps pace with new specification revisions is no small task, particularly when dealing with major version shifts like the transition from CXL 2.0 to 3.0.

SmartDV Licenses SDIO IP Family to Ranix for V2X Products

To meet RANiX’s unique design goals, SmartDV will customize the IP to go beyond the standard SDIO functionality—thereby empowering RANiX to differentiate from their competitors. SmartDV will also provide RANiX with the requisite support and documentation to achieve ASIL certification for ISO 26262.

SmartDV Rolls Out Multi-Phase Expansion Plan

SmartDV™ Technologies, provider of flexible, customizable semiconductor design IP (intellectual property) and verification solutions, has expanded engineering operations beyond its headquarters in Bengaluru with the opening of a new office space in Coimbatore, Tamil Nadu, India.

Frequently asked questions about Protocol Bridge IP cores

What is AMBA AXI4-Stream Assertion IP?

AMBA AXI4-Stream Assertion IP is a Protocol Bridge IP core from SmartDV listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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