Vendor: SmartDV Category: Protocol Bridge

AMBA AHB Synthesizable Transactor

AMBA AHB Synthesizable Transactor provides a smart way to verify the AMBA AHB component of a SOC or a ASIC in Emulator or FPGA pl…

Overview

AMBA AHB Synthesizable Transactor provides a smart way to verify the AMBA AHB component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's AMBA AHB Synthesizable Transactor is fully compliant with standard AMBA 2 AHB, AMBA 3 AHB-Lite and AMBA 5 AHB Specifications and provides the following features

Key features

  • Compliant with ARM AMBA 2 AHB, AMBA 3 AHB-Lite and AMBA 5 AHB specifications
  • Supports ARM11 extension
  • Supports AHB, AHB-Lite and AHB5 operation
  • Supports AHB Master, AHB Slave
  • Supports multiple masters and slaves
  • Supports ARM AMBA AHB data widths and address widths
  • Supports protocol transfer types, burst transfers and response types
  • Supports all transfer sizes
  • Slave supports fine grain control of response per address or per transaction
  • Master supports fine grain control of busy state insertion and master aborting
  • Supports early burst termination and locked transfers
  • Supports split and retry transfers
  • Supports continue or cancel of a transfer on error response
  • Supports programmable wait states or delay insertion
  • Ability to inject errors during data transfer
  • Supports programmable timeout insertion
  • Supports flexibility to send completely configured data
  • Supports FIFO memory
  • Supports on-the-fly protocol and data checking
  • AHB-Lite support
    • Transfer type changes during wait states
    • Address changes during wait states
    • Burst termination after a BUSY transfer
    • Early burst termination
  • AHB5 support
    • Extended memory types
    • Secure transfers
    • Endian
    • Stable between clock
    • Exclusive Transfers
    • Multi-Copy Atomicity
    • Locked transfers
    • Multiple slave select
    • Single-copy atomicity size
    • User signaling

Block Diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the AMBA AHB testcases
  • Examples showing how to connect various components, and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation contains User's Guide and Release notes

Specifications

Identity

Part Number
AMBA AHB Transactor
Vendor
SmartDV
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: India

Learn more about Protocol Bridge IP core

Keeping Pace with CXL Specification Revisions

As the Compute Express Link® (CXL®) specification rapidly evolves, so too must the tools and infrastructure used to verify designs built around it. Maintaining verification IP (VIP) that keeps pace with new specification revisions is no small task, particularly when dealing with major version shifts like the transition from CXL 2.0 to 3.0.

Frequently asked questions about Protocol Bridge IP cores

What is AMBA AHB Synthesizable Transactor?

AMBA AHB Synthesizable Transactor is a Protocol Bridge IP core from SmartDV listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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