Vendor: SmartDV Technologies Category: Protocol Bridge

AMBA 3 AHB-Lite Bus Verification IP

AMBA 3 AHB-Lite Bus Verification IP provides a smart way to verify the AMBA 3 AHB-Lite component of a SOC or an ASIC.

Contact Provider Request Datasheet
Verification IP View all specifications

Overview

AMBA 3 AHB-Lite Bus Verification IP provides a smart way to verify the AMBA 3 AHB-Lite component of a SOC or an ASIC. The SmartDV's AMBA 3 AHB-Lite Verification IP is fully compliant with standard AMBA 3 AHB-Lite specification. Our AMBA 3 AHB-Lite Bus VIP is proved across multiple customers.

AMBA 3 AHB-Lite Bus Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

AMBA 3 AHB-Lite Bus Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Compliant with ARM AMBA 3 AHB-Lite specification.
  • Supports AHB-Lite Master, Slave, Bus, Monitor and Checker.
  • Support for multiple slaves.
  • Supports all AHB-Lite data widths and address widths.
  • Supports all protocol transfer types, burst transfers and response types.
  • Support for all the transfer sizes.
  • Transfer type changes during wait states
  • Address changes during wait states
  • Burst termination after a BUSY transfer
  • Early burst termination
  • Supports constrained randomization of protocol attributes.
  • Slave supports fine grain control of response per address or per transaction.
  • Master supports fine grain control of busy state insertion and Master aborting.
  • Supports locked transfers.
  • Continue or cancel of a transfer on error response.
  • Support for programmable wait states or delay insertion.
  • Ability to inject errors during data transfer.
  • Programmable Timeout insertion.
  • Flexibility to send completely configured data.
  • Supports FIFO memory.
  • Rich set of configuration parameters to control AHB-Lite functionality.
  • On-the-fly protocol and data checking.
  • Notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
  • Built in coverage analysis.
  • Callbacks in Master, Slave, Bus and Monitor for various events.
  • Status counters for various events on bus.
  • AHB-Lite Bus Verification IP comes with complete testsuite to test every feature of AMBA 3 AHB-Lite specification.

Block Diagram

AMBA 3 AHB-Lite Bus VIP block diagram

Benefits

  • Faster testbench development and more complete verification of AMBA 3 AHB-Lite designs.
  • Easy to use command interface simplifies testbench control and configuration of Master, Slave and Bus.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the AMBA 3 AHB-Lite testcases.
  • Examples showing how to connect various components, and usage of BFM and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Specifications

Identity

Part Number
AMBA 3 AHB-Lite Bus VIP
Vendor
SmartDV Technologies
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact SmartDV Technologies

Learn more about Protocol Bridge IP core

A comparison of Network-on-Chip and Busses

This whitepaper summarizes the limitations of traditional bus-based approaches, introduces the advantages of the generic concept of NoC, and provides specific data about Arteris’ NoC, the first commercial implementation of such architectures

IP Core for an H.264 Decoder SoC

This paper presents the development of an IP core for an H.264 decoder. This state-of-the-art video compression standard contributes to reduce the huge demand for bandwidth and storage of multimedia applications. The IP is CoreConnect compliant and implements the modules with high performance constraints.

Frequently asked questions about Protocol Bridge IP cores

What is AMBA 3 AHB-Lite Bus Verification IP?

AMBA 3 AHB-Lite Bus Verification IP is a Protocol Bridge IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP