CDM Dependence on Device Capacitance
This blog will focus on what happens during the CDM pulse itself, and will show how the pulse properties change as a function of DUT to Field Plate capacitance.
Vendor:
Certus Semiconductor
Category:
GPIO
5V FSGPIO, 5V GPIO, 5V GPI, 5V ODIOy in DB HiTek 130nm
A Flip-Chip compatible I/O Library in Dongbu HiTek 130nm with 5V FSGPIO, 5V GPIO, 5V GPI, I2C-compliant ODIO and associated ESD.
Overview
A Flip-Chip compatible I/O Library in Dongbu HiTek 130nm with 5V FSGPIO, 5V GPIO, 5V GPI, I2C-compliant ODIO and associated ESD.
This flip-chip compatible library in Dongbu HiTek 130nm features a fail-safe GPIO, two standard GPIOs, a 5V GPI, and 5V I2C-compliant ODIO. The GFGPIO is a highly configurable 5V tolerant, multi-voltage, multi=-protocol I/O. The standard GPIO, both regular and reduced footprint, in this library is a highly configurable 5V tolerant, multi-voltage, multi-protocol I/O. The library’s GPI is a highly configurable general-purpose input cell which features three selectable input modes, three selectable resistive termination options, and a wide supply range. The library’s ODIO is a 5V I2C-compliant ODIO which features standard mode, fast-mode, and fast-mode plus, as well as selectable input modes, drive strength control and robust 2kV HBM protection. The library also supports I3C, SPI and QSPI standards. The library includes all layout and support cells. ESD targets are 2kV HBM and 500V CDM.
Operating Conditions
| Parameter | Value |
| VDDIO | 5V |
| Core VDD | 1.8V to 5V |
| BEOL | 1P4M |
| Tempeature | -40C to 125C |
| ESD | 2kV HBM & 500V CDM |
Cell Summary
| Item | Size |
| FSGPIO | 170um x 55um |
| GPIO | 170um x 55um |
| GPIO2 | 147.5um x 55um |
| GPI | 130um x 55um |
| ODIO | 115um x 55um |
ESD Summary
- Includes a variety of 5V ESD cells that either use a grounded-gate NFET architecture or an active RC clamp arhitecture.
- For appropriate protection, reference ESD cell usage in the Users Guide to ensure 2kV HBM
Standards
- I2C & I3C
- SPI & QSPI
Key features
- FSGPIO: 3 input/output modes, 3 on-die termination modes, input/output enable
- GPIO and GPIO2: 3 input/output modes, 3 on-die termination modes, input/output enable controls
- ODIO: I2C compliant, selectable input modes, drive strength control, 2kV HBM
- GPI: 3 selectable input modes, 3 selectable resistive termination options, wide supply range
Block Diagram
DN130 block diagram
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| DB HiTek | 130nm | BCD | — |
Specifications
Identity
Part Number
DN130
Vendor
Certus Semiconductor
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
United States
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Frequently asked questions about GPIO Pad Library IP cores
What is 5V FSGPIO, 5V GPIO, 5V GPI, 5V ODIOy in DB HiTek 130nm?
5V FSGPIO, 5V GPIO, 5V GPI, 5V ODIOy in DB HiTek 130nm is a GPIO IP core from Certus Semiconductor listed on Semi IP Hub. It is listed with support for dbhitek.
How should engineers evaluate this GPIO?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.