The ADC IP is a general-purpose successive approximation converter for low-power medium resolution applications.
The ADC IP is a general-purpose successive approximation converter for low-power medium resolution applications. Sample rate, resolution and power consumption are configurable.
It is built using typical differential capacitor-DAC architecture, clocked comparator and bootstrapped switches. No additional reference voltage is required, achieving lmost rail-to-rail input. The target applications are environmental and biomedical signal processing.
The ADC is silicon proven using the GlobalFoundries 22FDSOI process. Measurement results and samples are available.
Fraunhofer IIS provides a detailed documentation and support for the IP integration. Modifications, extensions and technology ports of the IP are available on request.
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| GlobalFoundries | 22nm | FDX | Silicon Proven |
Note: some files may require an NDA depending on provider policy.
11 Bit 100 kS/s Ultra-Low Power SAR ADC on GlobalFoundries 22FDSOI is a ADC IP core from Fraunhofer Institute Integrated Circuits and Systems (IIS) listed on Semi IP Hub. It is listed with support for globalfoundries Silicon Proven.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ADC IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.
