Silicon Creations
•
HQ:
USA
Our SerDes architecture is in production in processes ranging from 12nm to 180nm and at rates from 100Mbps to 32.75Gbps and prove…
- TSMC
- 40nm
- LP
Compare 68 SerDes PMA IP Listing from 20 vendors
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Xilinx, Inc.• HQ: USA
No charge paramaterizable core which utilizes the serial I/O transceivers available in the Kintex® UltraScale™, Virtex® UltraScal…
- Ethernet
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KNiulink Semiconductor Ltd.• HQ: China
With sophisticated architecture and technology, the SerDes PHY IP with PMA and PCS layer is designed for low power and high perfo…
- Single-Protocol PHY
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Programmable PCIe2/SATA3 SERDES PHY on TSMC CLN28HPC
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
- TSMC
- 28nm
- HPC
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Programmable Low Power SERDES Receiver on TSMC CLN65LP
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
- TSMC
- 65nm
- LP
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Programmable Low Power SERDES on TSMC CLN40G
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
- TSMC
- 40nm
- G
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Programmable Low Power SERDES on TSMC CLN28HPL
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
- TSMC
- 28nm
- HPL
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PCIe Express Gen4 / Ethernet SERDES on TSMC CLN5A
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
- TSMC
- 5nm
- N5A
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PCI Express Gen5 SERDES PHY on Samsung 8LPP
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
- Samsung
- 8nm
- 8LPP
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PCI Express Gen4 SERDES PHY on Samsung 7LPP
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
- Samsung
- 7nm
- SF7LPP
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PCI Express Gen4 / Ethernet SERDES on TSMC CLN5
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
- TSMC
- 5nm
- N5
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PCI Express Gen3/Enterprise Class SERDES PHY on Samsung 28LPP
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
- Samsung
- 8nm
- 8LPP
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PCI Express Gen3/4 Enterprise Class SERDES PHY on Samsung 14LPP
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
- Samsung
- 8nm
- 8LPP
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PCI Express Gen3 SERDES PHY on TSMC CLN40G
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
- TSMC
- 40nm
- G
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PCI Express Gen3 SERDES PHY on Samsung 7LPP
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
- Samsung
- 7nm
- SF7LPP
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PCI Express Gen3 SERDES PHY on Samsung 28LPP
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
- Samsung
- 8nm
- 8LPP
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PCI Express Gen3 / SATA3 SERDES PHY on Samsung 28FDSOI
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
- Samsung
- 28nm
- FDS
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Custom Programmable Low Power SERDES on GLOBALFOUNDRIES 65G
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
- GlobalFoundries
- 65nm
- G
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16Gbps multi-protocol programmable SerDes PHY in UMC 28HPC+
Faraday Technology• HQ: TaiwanFaraday 16Gbps multi-protocol programmable SerDes PHY IP in UMC 28HPC+ process is designed with a system-level approach to provid…
- UMC
- 28nm
- HPC
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Low Power PCIe3/SATA3 Gen3 PHY on TSMC CLN28HPC+
Analog Bits Inc.• HQ: USAThe Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
- TSMC
- 28nm
- HPC+