TSMC CLN6FF/7FF Die-to-Die Interface PHY
This IGAD2DX01A test report shows the functional and characterization test result of GUC Die-to-Die Interface PHY IP for 8 Gbps o…
- TSMC
- 6nm
- N6FF
- Silicon Proven
TSMC CLN6FF/7FF Die-to-Die Interface PHY
This IGAD2DX01A test report shows the functional and characterization test result of GUC Die-to-Die Interface PHY IP for 8 Gbps o…
TSMC CLN3FFE GLink 2.3LL Die-to-Die PHY
IGPD2DZO1A is a high-speed Die-to-Die interface PHY that transmits data through TSMC packaging solutions, Integrated Fan-Out (InF…
TSMC CLN5FF GLink 2.0 Die-to-Die PHY
IGPD2DY01A is a high-speed Die-to-Die interface PHY that transmits data through TSMC packaging solutions: Integrated Fan-Out (InF…
TSMC CLN5FF GLink 2.3LL Die-to-Die PHY
IGAD2DY04A is a high-speed die-to-die interface PHY which transmits data through TSMC packaging solutions: Integrated Fan-Out (In…
TSMC CLN7FF GLink-3D Die-to-Die Slave PHY
IGAD2DX03A is a GLink-3D high speed die-to-die interface Slave PHY.
TSMC CLN5FF GLink-3D Die-to-Die Master PHY
IGAD2DY02A is a GLink-3D high speed die-to-die interface Master PHY.
UCIe Controller add-on CXL2 Protocol Layer
The UCIe Controller IP encompasses the Die-to-Die Adapter Layer and Protocol Layer for widely used protocols, such as PCI Express…
UCIe Controller add-on CXL3 Protocol Layer
The UCIe Controller IP encompasses the Die-to-Die Adapter Layer and Protocol Layer for widely used protocols, such as PCI Express…
UCIe Controller baseline for Streaming Protocols for ASIL B Compliant, AEC-Q100 Grade 2
The UCIe Controller IP encompasses the Die-to-Die Adapter Layer and Protocol Layer for widely used protocols, such as PCI Express…
UCIe Controller baseline for Streaming Protocols
The UCIe Controller IP encompasses the Die-to-Die Adapter Layer and Protocol Layer for widely used protocols, such as PCI Express…
BlueLynx PHY IP is one side of a die-to-die parallel interface delivered as a single GDS Hard IP and a single RTL Soft IP.
The SLM Signal Integrity Monitor (SIM) IP enables signal quality measurement for die-to-die interfaces.
The BoW Verification IP provides an effective & efficient way to verify the BoW components of an IP or SoC.
Die-to-Die, High Bandwidth Interconnect PHY in TSMC (N7, N5)
The Synopsys High-Bandwidth Interconnect PHY IP enables high bandwidth, low-power and low-latency die-to-die connectivity in a pa…
Die-to-Die, High Bandwidth Interconnect PHY Ported to TSMC N7 X24
The High-Bandwidth Interconnect PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for…
The High-Bandwidth Interconnect PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for…
Die-to-Die, AIB 2.0 PHY Ported to Intel 16, North/South (vertical) poly orientation
The High-Bandwidth Interconnect PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for…
The NuLink technology delivers low-power and high-performance D2D IP core products, which support multiple industry standards and…
TSMC CLN5FF GUCIe LP Die-to-Die PHY
IGAD2DY11A is an LP (Low Power) Die-to-Die (D2D) PHY for SoIC-X Face-to-Face package.
ForwardEdge’s UCIe IP enables scalable die-to-die connectivity for chiplet-based SoCs.