The Synopsys HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and net…
- Controller + PHY + 1
- TSMC
- 3nm
- N3E
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The Synopsys HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and net…
The Synopsys HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and net…
HBM3 PHY V2 (Hard 1) in TSMC (N3E)
The Synopsys HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and net…
HBM3 PHY (Hard 1) in TSMC (N5)
The Synopsys HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and net…
HBM2E PHY V2 in TSMC (N7, N6, N5)
The HBM2/HBM2E PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), graphics, and networking…
HBM2E PHY V2 (Hard 1) in TSMC (N7, N6, N5)
The Synopsys HBM2/HBM2E PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), graphics, and n…
DDR5/4 PHY in Samsung (10nm, 8nm, 7nm)
The Synopsys DDR5/4 PHY is a physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications req…
The Synopsys DDR5/4 PHY is a physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications req…
DDR5/4 PHY in TSMC (16nm, 12nm, N6, N7, N5)
The Synopsys DDR5/4 PHY is a physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications req…
The Synopsys DDR5/4 PHY is a physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications req…
The Synopsys DDR4 multiPHY is a physical (PHY) layer IP interface solution for PC/consumer and mobile ASICs, ASSPs, system-on- ch…
USB-C 3.1/DP TX PHY in GF (22nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB-C 3.1 DP/TX PHY ebdaux in TSMC (N5, N3E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB 3.1 PHY (10G/5G) in GF (22nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
LPDDR4x/5 Secondary/Slave (memory side!) PHY
This LPDDR4/4X/5 PHY is a memory-side interface IP normally found implemented within commodity DRAM products.
112G LR-Max Ethernet PHY for TSMC N5
Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networki…
224G Ethernet PHY for TSMC 3nm
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth…
12bit, 640Msps Dual channel IQ ADC IP Core
Dual channel 12-bit, 640MS/s ADC is essentially a Dual channel 12-bit analog-to-digital converter (ADC) that can function at spee…
Low-power, high-speed 11-bit, 8 GSPS SAR ADC - TSMC 28nm HPC+
The A11B8G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
11-bit SAR ADC - TSMC 28nm HPC+
The A11B4G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.