Vendor: Curious Corp. Category: Multi-Protocol PHY

MIPI D-PHY/sub-LVDS Transmitter - 8-Lane 2.5Gbps - TSMC 28nm HPC+

The CL12661M8T1KM2JIP is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System.

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TSMC 28nm Silicon Proven View all specifications

Overview

The CL12661M8T1KM2JIP is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System. The CL12661M8T1KM2JIP is designed to support data rate in excess of maximum 2.5Gbps utilizing sub-LVDS / MIPI-DPHY interface specification. The CL12661M8T1KM2JIP can change Interface type to same PAD for changing mode.

Key features

  • MIPI DPHY v1-2 / MIPI CSI2 compliant
  • Differential signal of almost CIS serial outputs support
    • 1) sub-LVDS (Maximum 800Mbps)
    • 2) MIPI-DPHY (Maximum 2.5Gbps)
  • Xtal Input Clock Frequency Selectable: 24 - 72MHz
  • Input Clock Frequency:
    • (sub-LVDS 8/10/12/14/16 bit SER) PCK_N= ~100MHz
    • (MIPI-DPHY 8bit SER) PCK_N= ~313MHz
  • Output Clock Frequency: ~1250MHz Output Data Rate: ~2.5Gbps
  • Power Supply : 1.8V( I/O, Analog) 1.2V(LP_DRIVER) 0.9V(Core)
  • Max TX Lane Number:
    • sub-LVDS Clock 1-port / Data 8/4 -ports (lanes)
    • MIPI-DPHY Clock 1-port / Data 4/2 -ports (lanes)
  • Data Input Path:
    • 1) MIPI DPHY (8bit Parallel)
    • 2) Others (8, 10, 12, 14, 16 bit Parallel)
  • Include Power Down Mode
  • Output impedance : Adjustable in settings
  • Process TSMC 28HPC+ (1P10M_5X2Y2R) Regular Vth only
  • Various process porting support available ( Please contact us. )
  • Supporting Link-layer (Soft Macro): CD12661IP

Benefits

  • We are IP design professional engineering company, so we can provide the high quality and good performance solution. Also we can provide not only single-interface PHY but also multi-interface PHY.
  • We are making the PHY to meet customer specification by having our own IP data base resource. Our business is very flexibility IP license model, and then we have a lot of license to many sensor companies.
  • Our products can contribute to your business.

Applications

  • Camera Application
    • Security Camera
    • Mobile-Phone Camera
    • DSC(Digital Still Camera)
    • Medical Camera
    • SLR
    • 3D Camera
    • Camcorder
  • ISP(Image Signal Processer)

What’s Included?

  • Verilog Model (verilog / vcs)
  • .db file / .lib(Option) file
  • symbol / LVS netlist / Hspice netlist(Option)
  • LEF, layer map file, layout technology file
  • Layout Verification Report (DRC & LVS), Command file
  • Datasheet (This file) /Application Note (Usage connection CIS)
  • Packaging and Layout Guideline / PCB Guideline
  • Static Delay Analysis (STA) Guideline
  • Testing Guideline (Option)
  • TX or RX Verilog Model and Test Vector(Option)
  • CMOS Image Sensor Verilog Models(Option)
  • Combo Link Layer IP(CD12661IP) and FPGA Board(Option)

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Silicon Options

Foundry Node Process Maturity
TSMC 28nm 28nm 280 nm Silicon Proven

Specifications

Identity

Part Number
CL12661M8T1KM2JIP2500
Vendor
Curious Corp.

Provider

Curious Corp.
HQ: Japan
CURIOUS Corporation was established in July, 2001. We develop Analog/Mixed Signal (Analog/Digital Mixture) IP and IC ( Integrated Circuits). Especially,we are good at interface circuits and imaging capture circuits. And our IP and IC are used mobile-phone and flat panel display. In the future, all information processing machines will be presumed to be connected over a form of network or another. As such demands for these machines are expected to increase considerably in the ever-expanding world of communication with this increase demands for the LCD Driver will also undoubtedly rise. With the present lack of analog design capacity in the world due to a shortage of analog engineers. Our main purpose is to work hard to provide our customers with the best expert advice and services possible.
Contact Curious Corp.

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Frequently asked questions about Multi-Protocol PHY IP cores

What is MIPI D-PHY/sub-LVDS Transmitter - 8-Lane 2.5Gbps - TSMC 28nm HPC+?

MIPI D-PHY/sub-LVDS Transmitter - 8-Lane 2.5Gbps - TSMC 28nm HPC+ is a Multi-Protocol PHY IP core from Curious Corp. listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this Multi-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Multi-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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