MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
The Renesas MIPI D-PHY and FPD-Link (LVDS) combinational Transmitter is useful 4 Data Channel driver hard macro for DSI of TSMC 2…
Overview
The Renesas MIPI D-PHY and FPD-Link (LVDS) combinational Transmitter is useful 4 Data Channel driver hard macro for DSI of TSMC 22nm ULP process.
Key features
- Renesas MIPI D-PHY Transmitter can be used for analog Driverof following interface .
- MIPI alliance Specification for D-PHY Version 2.1 15 December 2016.
- MIPI alliance Specification for Display Serial Interface (DSI).
- Renesas LVDS Transmittercan be used for analog Driver of following interface.
- FPD-Link(LVDS) Specification for Version D-PHY ANSI/TIA/EIA-644-A FEBRUARY 2001.
- Technology is TSMC 22nm ULP 1p10M.
- Supply voltage can be applied 1.0V for core voltage, 1.8V for IO voltage.
- Maximum data rate of each channel is 1.5Gbps at High-speed mode for MIPI D-PHY Transmitter.
- Data rate of each channel is 609Mbps for FPD-Link(LVDS).
Block Diagram
Files
Note: some files may require an NDA depending on provider policy.
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 22nm | ULP | — |
Specifications
Identity
Provider
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Frequently asked questions about Multi-Protocol PHY IP cores
What is MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP?
MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP is a Multi-Protocol PHY IP core from Renesas listed on Semi IP Hub. It is listed with support for tsmc.
How should engineers evaluate this Multi-Protocol PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Multi-Protocol PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.