IEEE 1588 core is compliant with IEEE Standard 1588-2019 specification.
- IEEE-1588 / PTP
Time Synchronization IP cores enable standards-based low-speed control and peripheral communication in modern SoC and ASIC designs.
These IP cores support precise time distribution and timestamp coordination across distributed embedded and networking systems, helping designers integrate interoperable control links across embedded, automotive, industrial, and connectivity-focused systems
This catalog allows you to compare Time Synchronization IP cores from leading vendors based on feature set, latency, power consumption, and process node compatibility.
Whether you are designing industrial automation, telecom infrastructure, automotive networks, or synchronized control systems, you can find the right Time Synchronization IP for your application.
IEEE 1588 core is compliant with IEEE Standard 1588-2019 specification.
The PTP/gPTP Verification IP provides an effective & efficient way to verify the components interfacing with PTP/gPTP interface o…
Multi-protocol time synchronization IP
Provides sub-microsecond time synchronization, ensuring maximum flexibility for every scenario
IRIG 200-04 compliant time synchronization slave / time receiver for FPGA
IRIGtimeM implements an IRIG 200-04 compliant time synchronization master on FPGA devices.
PTP ordinary (master / time transmitter & slave / time receiver) clock
Provides nanosecond level clock synchronized to network PTP time transmitter.
Microsecond Channel (MSC/MSC-Plus) Controller
The MSC-CTRL IP core implements a high-speed serial interface controller designed to connect a microcontroller or SoC to external…
Supports DMA transfers between M_CAN Message RAM and System Memory Up to sixteen 32-bit timestamps supported by TSU On reception …
Timing and Synchronization protocol implementation for application in Automotive Ethernet (AVB/TSN), Industrial automation and co…
Time Synchronization over Internet Protocol
The ST 2059 core is an FPGA IP core that generates timing and clock signals according to the SMPTE ST 2059 standard defined by th…
Intel® Precision Time Protocol Servo (Intel® PTP Servo) FPGA IP
Coordinate the actions of disparate electronic systems that must be synchronized in time with Intel® PTP Servo, which employs har…
NetTimeLogic’s NTP Server is a full hardware (FPGA) only implementation of a SNTPv4 Server according to RFC 4330/5905.
NetTimeLogic’s NTP Clientis a full hardware (FPGA) only implementation of a SNTPv4 Client according to RFC 4330/5905.
Video transfer over IP, Supports PTP SMPTE ST 2059 is a standard for synchronization of video equipment over an IP network.
IEEE 1588 Boundary, Slave And Master Clock
The IPC9004 utilizes IPClock’s technology for IEEE 1588 v2 optimized for providing high quality frequency synchronization and Tim…
syn1588® enabled IEEE 1588 compliant clock synchronisation
The syn1588® Clock_M IP core offers the full syn1588® technology with a suitable number of trigger and IO events supported.
Ethernet Filters for Precision Time Protocol on Automotive Ethernet
Various systems used in a car like Driver Assist System (ADAS) and Time-Sensitive Network (TSN) typically require large bandwidth…
Software Defined Radio for High Throughput PTP and PTMP network communication
This SDR is targeted for data communication where secure point-to-point to multi-point links are established that mostly finds it…
IEEE 1588 Boundary, Slave And Master Clock
The IPC9010 utilizes IPClock’s IEEE 1588 v2 technology optimized for providing high quality frequency synchronization and Time of…
IEEE 1588 Boundary, Slave And Master Clock
The IPC9006 utilizes IPClock’s IEEE 1588 v2 technology optimized for providing high quality frequency synchronization and Time of…