PCIe 2.0 PHY in GF (40nm, 28nm, 22nm, 12nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet to…
The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 speci…
HDMI 2.1 eARC Rx PHY in GF (12nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 spec…
MIPI M-PHY G4 Type 1 2TX2RX in GF (12nm)
The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 …
MIPI D-PHY Tx-Only 4 Lanes in GF (12nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Rx-Only 4 Lanes in GF (28nm, 12nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Rx-Only 2 Lanes in GF (28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Bidirectional 4 Lanes in GF (40nm, 28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Bidirectional 2 Lanes in GF (40nm, 28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and…
LPDDR4X multiPHY Plus in GF (12nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
LPDDR4 multiPHY V2 in GF (22nm) for Automotive
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
LPDDR4 multiPHY V2 in GF (22nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
The Synopsys DDR5/4 PHY is a physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications req…
USB-C 3.1/DP TX PHY in GF (22nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB 3.1 PHY (10G/5G) in GF (22nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
32G Multi Rate Very Short Reach SerDes PHY - GlobalFoundries 12LP and 12LPP
Extoll’s SerDes architecture is based on digital design elements and methodologies.
32G Multi Rate Long Reach SerDes PHY - GlobalFoundries 12LP and 12LPP
Extoll’s SerDes architecture is based on digital design elements and methodologies.
The asicNorth ANTEMPSNS0100 is a fully integrated, high resolution temperature sensor ADC with selectable outputs of 9-bits, 16-b…