Vendor: Rambus, Inc. Category: MACsec

1.6T/3.2T Multi-Channel MACsec Engine with TDM Interface (MACsec-IP-364)

MACsec solution for data center, service providers, 5G and AI The MACsec-IP-364 is a MACsec/IPsec engine developed specifically f…

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Overview

MACsec solution for data center, service providers, 5G and AI

The MACsec-IP-364 is a MACsec/IPsec engine developed specifically for high-speed, multi-rate and multi-port Ethernet devices. Its architecture provides an optimal multi-protocol solution for aggregate throughput for 1.6T and 3.2T. The MACsec-IP-364 is ideal for deployment in data center, enterprise and carrier network applications, as well as network-attached high-performance computing.

Remarkable progress in optical connectivity in combination with the ramp of 3/2nm silicon technology has enabled 1.6T pluggable optical modules for short-reach (<10km) to long-haul (>500km) applications. A new generation of Rambus industry-proven MACsec/IPsec Silicon IP can secure Terabit-plus Ethernet traffic while maintaining power budgets and addressing the latency and throughput requirements of advanced end applications.

How the MACsec-IP-341 Works

The MACsec-IP-364 engine provides complete MACsec SecY frame processing for multiple channels (ports). It supports multiple SecY (virtual ports) to realize protection for each individual virtual network running over the same physical port. Its pooled classification and transformation resources allow optimal implementation of multi-port designs. A segmented, fat-pipe design allows aggregating multiple ports to use the same MACsec SecY as well as protecting a single port.

The MACsec-IP-363 is a virtual port matching classifier that works with the MACsec-IP-364 to form an autonomous MACsec processing data path. Alternatively, the MACsec-IP-364 can be used in combination with an external classifier or stand alone, depending on the use case.

The MACsec-IP-364 (+ 363) engine offers flexibility on integration in the customer’s Ethernet subsystem. Integration depends on the following major factors: data path design (channelized or port-based), bus width, number of packets per clock, location of the IEEE 1588 timestamping and preferred method for handling packet expansion (per-packet or port-based). Customers have the flexibility to implement buffering and flow control according to their system requirements.

The engine provides the minimum latency and deterministic latency and can be used in combination with IEEE1588 timestamp update logic.

For applications that require numerous SA and TCAM matching rules, the engine can be supplied with a TCAM controller that supports configurable TCAM profiles. The default TCAM implementation is logic-based.

Key features

Packet Interface

  • Channelized interface (TDM)
  • Segmented data bus from 1024-bit to 2048-bit (multiple options)
  • Low and deterministic latency
  • Up to 64 channels (ports)
  • Flexible bandwidth allocation
  • FlexE ready

Classification and Resource Scaling

  • Pooled SecY/SC and SA
  • TCAM (internal or external)
  • Statistics
  • Scaling up to 8K SA and TCAM rules

Control Interface

  • 32-bit register interface
  • Interrupts (global and per-channel)

MACsec Support

  • IEEE 802.1AE-2018
  • MACsec with up to 4x VLAN-in-clear

Extra Protocols

  • IPsec ESP transport/tunnel modes

NIST CAVP Compliance for FIPS 140-3 Validation

  • Support for basic AES and AEC-GCM transformations

Block Diagram

MACsec-IP-364 block diagram

Benefits

  • Complete and fully compliant MACsec Packet Engine with classifier and transformation engines for rates of 1.6T and 3.2T, up to 64 channels, ready for FlexE
  • All IEEE MACsec standards supported (including IEEE802.1AE-2018). Optional inclusion of IPsec ESP transport and tunnel modes
  • Supplied with the Driver Development Kit to accelerate time to market. Rambus offers MACsec Toolkit for IEEE 802.1X key management

What’s Included?

Packages

  • Silicon IP
  • Driver Development Kit

Complete Documentation

  • Hardware integration manual
  • Hardware and programming manuals
  • IP-XACT Register description
  • SRAM memory list
  • Driver usage and porting manuals

Tools and Scripts

  • Setup and Simulation scripts
  • Synthesis scripts

Integration Support

  • UVM verification test bench
  • Comprehensive set of test vectors

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
MACsec-IP-364
Vendor
Rambus, Inc.

Provider

Rambus, Inc.
HQ: USA
Rambus delivers industry-leading chips and silicon IP for the data center and AI infrastructure. With over three decades of advanced semiconductor experience, our products and technologies address the critical bottlenecks between memory and processing to accelerate data-intensive workloads. By enabling greater bandwidth, efficiency and security across next-generation computing platforms, we make data faster and safer.
Contact Rambus, Inc.

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Frequently asked questions about MACsec IP cores

What is 1.6T/3.2T Multi-Channel MACsec Engine with TDM Interface (MACsec-IP-364)?

1.6T/3.2T Multi-Channel MACsec Engine with TDM Interface (MACsec-IP-364) is a MACsec IP core from Rambus, Inc. listed on Semi IP Hub.

How should engineers evaluate this MACsec?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MACsec IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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