Paradigm Works Releases Key Verification Productivity Software for the Open Verification Methodology (OVM)
ANDOVER, Mass. -- August 17, 2009
-- Paradigm Works, Inc., a world-class leader in ASIC and FPGA development services and software, announced today that it has made a key software contribution to the chip development community, donating its advanced SystemVerilog FrameWorksTM OVM Template Generator for free use through the Open Verification Methodology (OVM) World community website. Functional verification engineers using the OVM for SystemVerilog can now use the free Paradigm Works SystemVerilog FrameWorksTM OVM Template Generator to reduce their development time and effort in delivering chips to market.
The OVM Template Generator enables verification engineers to specify a template for their SystemVerilog-based OVM project environments and create derivative environments on demand. âOur approach makes it easier for first-time OVM users to get started, thus significantly reducing the development time for SystemVerilog OVM environments,â said Jim Crocker, Vice President of Engineering at Paradigm Works. âVerification teams at all experience levels find that the OVM Template Generator enables the rapid implementation and adoption of the OVM methodology across team and corporate boundaries.â
Verification teams are now able to ramp up their SystemVerilog-based OVM environments faster because the OVM Template Generator generates an OVM-compliant environment based on command line user inputs that specify which components are desired in the environment. With the tool relieving verification engineers from having to make many of the OVM implementation decisions, verification engineers are therefore liberated to apply more of their development efforts toward their application-specific code.
The toolâs auto-generated code is project-proven and high quality, as the OVM Template Generatorâs predefined code templates are verified against the OVM compliance checklist provided by Mentor Graphics, co-developer of the OVM. The auto-generated environment improves code consistency and ease of reuse across projects. Development teams can leverage the toolâs templates to propagate coding guidelines and other project standards.
âThe ongoing development and use of chip development tools compatible with OVM, like Paradigm Works Template Generator, help make OVM the leading verification methodology of choice,â says Dennis Brophy, Director of Strategic Business Development with Mentor Graphics. âWe are pleased to see Paradigm, an active member of the Questa Vanguard Partner program, delivering unique functionality for the growing community of OVM users.â
About Paradigm Works
Paradigm Works is an industry-leading ASIC and FPGA Software and Services Company based in Andover, MA. Paradigm Works has successfully completed ASICs and FPGAs for clients ranging from Fortune 100 companies to startups developing revolutionary products. Paradigm Works provides software tools that enable higher levels of productivity and quality in ASIC and FPGA projects. More information about Paradigm Works and its products and services is available at www.paradigm-works.com.
Related Semiconductor IP
- MIL-STD-1553 Controller IP
- UFS 5.x Device IP
- UCIe 3.x Controller IP
- Ethernet 800G PCS IP
- CHI to UCIe Bridge IP
Related News
- Siemens leverages AI to close industry’s IC verification productivity gap in new Questa One smart verification solution
- Cadence Revolutionizes Verification Productivity with the Verisium AI-Driven Verification Platform
- Cadence Verisium AI-Driven Verification Platform Accelerates Debug Productivity for Renesas
- Siemens acquires Insight EDA to expand Calibre integrated circuit reliability verification offering
Latest News
- CAST Introduces PSI5-HOST IP Core for Automotive Sensor Interfaces
- StarFive and LECARC Forge Partnership to Co-Develop RISC-V Server CPUs and Seize New Opportunities in the Agentic AI Era
- ASICLAND Selected as SK hynix’s Partner for Next-Gen eSSD Development, Establishing a ‘K-Semiconductor Win-Win’ Model
- onsemi to Acquire Synaptics to Enable the Next Generation of Intelligent Systems for Physical AI
- EdgeAI Licensed Andes Technology CPU IP to Power Next-Generation Edge AI Neuromorphic Solution