Ultra-low power 16-bit microcontroller core consumes less than 40 uA per MIPS.
GRENOBLE, France – November 2008 – Tiempo today announces its new chip, fully operational at first run, that silicon-proves its 16-bit microcontroller core IP – TAM16 – on a CMOS 130 nm general-purpose process. The chip logic has been entirely designed in Tiempo’s innovative asynchronous and delay insensitive technology.
The 16-bit microcontroller core offers a power-efficient instruction set, with fast, energy-efficient and easy-to-program interrupt management and peripheral communications, making it ideally suitable for ultra-low power embedded electronics. The core also integrates various peripherals such as interrupt controller, UART and cascadable timers, and is interfaced to standard ROM (incl. BIST) and RAM.
Chip core consumes down to 37 μA per MIPS when operating at 0.7 V (47 μA at 1.2 V), including leakage current of used general-purpose process. Power consumption of instructions that include communication with peripherals and memories - and that typically require 2 or 3 clock cycles with a synchronous microcontroller – was measured at 61 μA, i.e., less than 25 μA per (equivalent) MHz.
Thanks to its innovative design technology, the microcontroller instantaneously falls into sleep mode when no activity is detected and wakes-up in a few nanoseconds when activity resumes.
Targeted applications are ultra-low power chips for embedded electronics, e.g. power management chips, sensor networks, metering devices, RFID, smartcards, but also chips that must operate with low electromagnetic emissions, e.g. electronics for the automotive and medical industries.
Tiempo asynchronous 16-bit microcontroller chip performances will be demonstrated at the IP’2008 Conference & Exhibition, December 3-4, 2008, in Grenoble, France.
About Tiempo
Tiempo, located in Montbonnot, France, develops and commercializes Core IPs for the design of innovative integrated circuits that are ultra-low power, ultra-low noise, low voltage, robust versus PVT variations and secured. TIEMPO IP portfolio includes ultra-low power and secured asynchronous cores of microcontrollers, microprocessors and crypto-processors, and is supported by an automated synthesis tool using standard input languages. Targeted applications are chips for embedded electronics (ultra-low power, low-power & high performances) and secured devices.
Related Semiconductor IP
- Chiplet Die-to-Die Interconnect IP Solution
- High speed MACsec Engine 100G/200G/400G/800G/1.6T
- Temperature/Voltage sensors
- AMBA Bus Host to eSPI Controller/Target
- AMBA Bus Host to eSPI Controller
Related News
- Innatera unveils its groundbreaking ultra-low power neuromorphic microcontroller
- EEMBC Benchmark to Reveal the Truth Behind Microcontroller Ultra-Low Power Claims
- Ultra-low power 32-bit microcontroller with advanced power modes from Dolphin Integration
- sureCore announces ultra-low power memory IP for AI applications
Latest News
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology
- MIPI A-PHY To Power Industry’s First Four-Company Automotive SerDes Interoperability Demonstration at AutoSens USA