TSMC to Build 3nm Fab in Tainan Science Park
Hsinchu, Taiwan, R.O.C. – Sept. 29, 2017 – TSMC today announced that, following careful evaluation, the Company’s planned advanced 3nm fab will be located in the Tainan Science Park to fully leverage the company’s existing cluster advantage and the benefit of a comprehensive supply chain. TSMC recognizes and is grateful for the government’s clear commitments to resolve any issues, including land, water, electricity and environmental protection.
Related Semiconductor IP
- Ultra-Low Latency 32Gbps SerDes IP in TSMC 12nm FFC
- Ultra-Low Latency 32Gbps SerDes IP in TSMC 22nm ULP
- 32Gbps SerDes IP in TSMC 12nm FFC
- 32Gbps SerDes IP in TSMC 22nm ULP
- MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
Related News
- Report: TSMC's 3nm Fab Could Cost $20 Billion
- Alphawave Semi Launches Industry's First 3nm UCIe IP with TSMC CoWoS Packaging
- ESMC Breaks Ground on Dresden Fab
- Unveiling the Availability of Industry's First Silicon-Proven 3nm, 24Gbps UCIe™ IP Subsystem with TSMC CoWoS® Technology
Latest News
- SEMI Reports Worldwide Silicon Wafer Shipments Increase 13% Year-on-Year in Q1 2026
- POLYN Technology Announces Tapeout of Automotive Chip
- QuickLogic Establishes New Banking Relationship and Secures $10 Million Revolving Credit Facility
- TES is extending its PMU IP portfolio for X-FAB’s XT018 - 0.18µm BCD-on-SOI technology.
- RF Front-End Modules & Components IP Trends – Q1 2026 Monitoring Release