Sony Joins FDSOI Club
Junko Yoshida
1/30/2015 05:15 PM EST
MADISON, Wis. — Sony Corp. revealed that the company’s next-generation Global Navigation Satellite System (GNSS) chip will use 28-nm Fully Depleted Silicon On Insulator (FDSOI) process.
The test chip based on the FDSOI process marks a dramatic reduction in power consumption. A Sony engineer, who spoke at the SOI Industry Consortium in Tokyo, told the audience that Sony was able to cut power consumption in its GNSS chip from 10mW to 1mW.
The Japanese company used STMicroelectronics’ 28nm FDSOI design kit, and manufactured its FDSOI samples at ST's fab.
To read the full article, click here
Related Semiconductor IP
- NPU IP
- JPEG XL Encoder
- I2C Master/Slave Controller Core
- NVMe Validation Test Suite
- Hybrid Memory Cube Verification IP
Related News
- Sony To Use FD-SOI in Stacked Image Sensors
- Sony-Inside Huami Watch: Is It Time for FD-SOI?
- Three customers, STMicroelectronics, ARM Ltd. and Sony Corp. invest in CoWare
- CoWare to Enter Licensing and Technical Support Agreement with Sony To Speed Chip Design for Sony's Next-Generation AV-IT Products
Latest News
- GF unveils roadmap to deliver the world’s most advanced FD-SOI platform for Physical AI
- GlobalFoundries marks Dresden expansion milestone, announces next-generation platform for Physical AI
- TSMC September 2026 Revenue Report
- Lattice Collaborates with Arm to Advance Secure, Adaptable AI Data Center Infrastructure
- ZLG Selects CAST CAN XL and TSN IP for Next-Generation Vehicle-Network Development and Test Tools