Startup Ricursive to Create an End-to-End AI Model for Chip Design
By Sally Ward-Foxton, EE Times | June 10, 2026

Palo Alto, Calif. — Startup Ricursive, founded by the two leads from Google’s famous AlphaChip project, is aiming to develop an end-to-end AI model for chip design. The new AI frontier lab is focused on hardware workload co-optimization, with the first stages of its rollout targeting workload-specific chip design for third parties. The company has raised $335 million, which will largely be spent on GPU compute hours as it trains and tests its model.
In an exclusive interview with EE Times, Ricursive co-founder and CEO Anna Goldie, as well as co-founder and CTO Azalia Mirhoseini, stressed that the startup is not an EDA company, will not compete with EDA companies, and will not utilize standard EDA toolchains.
To read the full article, click here
Related Semiconductor IP
- GPU
- V-by-One Verification IP
- AI model compression IP
- Hardware compressed memory IP for CXL devices and chip-to-chip links
- Hardware link (de)compression IP for die-to-die, chip-to-chip, and DRAM interfaces
Related News
- Seligman Ventures Leads Cognichip’s $60M Series A to Back Physics-Informed AI for Chip Design, Intel CEO Lip-Bu Tan and Seligman Ventures’ Umesh Padval Join the Board
- Hardware Root of Trust Essential for AI Chip Integrity
- Cadence and Google Collaborate to Scale AI-Driven Chip Design with ChipStack AI Super Agent on Google Cloud
- Siemens collaborates with TSMC to advance AI for semiconductor design
Latest News
- TSMC Boosts 2026 Expansion Budget, Adds $100B to U.S. Investment
- ZeroPoint Technologies Announces ZeroStream
- TSMC Reports Second Quarter EPS of NT$27.25
- Rapidus and Cadence Partner on Agentic AI for Advanced SoC Design
- Defacto’s SoC Compiler Drastically Improved Productivity of L&T Semiconductor Technologies