Quickpath IP bound for Achronix FPGAs
Peter Clarke, EETimes
11/4/2010 9:05 AM EDT
LONDON – Achronix Semiconductor Corp. will be including the hard Quickpath IP core in support of processor communications on forthcoming field programmable gate arrays enabled by Intel manufacturing.
Quickpath Interconnect is a point-to-point processor interconnect developed by Intel to compete with HyperTransport. The move looks set to be a pre-cursor to the inclusion of one or multiple hard Intel processor cores on an Achronix FPGA.
It adds fuel to the idea of the importance of multicore-processor-array-plus-FPGA-fabric as a generalized design platform going forward. It supports the idea that the Intel-Achronix deal parallels an FPGA-processor collaboration announced by Xilinx Inc. and ARM Holdings plc in October 2009.
To read the full article, click here
Related Semiconductor IP
- 1.6T Ultra Ethernet Controller
- Chiplet Die-to-Die Interconnect IP Solution
- High speed MACsec Engine 100G/200G/400G/800G/1.6T
- Temperature/Voltage sensors
- AMBA Bus Host to eSPI Controller/Target
Related News
- CAST and Achronix Expand Partnership to Deliver Secure FPGA Solutions
- Achronix Acquires Key IP and Expertise from FPGA Networking Solutions Leader Accolade Technology
- Achronix Announces Speedster7t AC7t1500 FPGA General Availability
- Primemas Selects Achronix Embedded FPGA Technology For System-on-Chip (SoC) Hub Chiplet Platform
Latest News
- Imec unlocks fourfold UWB range extension using world-first narrowband receiver chip compliant with IEEE 802.15.4ab standard
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology