Mosis offers IBM 90-nm process on MPW
Peter Clarke, EE Times
(05/09/2006 3:13 PM EDT)
MUNICH, Germany
(05/09/2006 3:13 PM EDT)
MUNICH, Germany
â The Mosis integrated circuit fabrication service has begun offering multi-project wafer (MPW) runs on 90-nanometer process technologies from IBM, according to Paul Double, managing director of EDA Solutions Ltd.
The process is the 9SF process, which comes in three variants, low power digital, standard digital and analog and RF, said Double. The first customer submission deadline is Dec. 4, 2006, according to the Mosis website.
To read the full article, click here
Related Semiconductor IP
- Ultra Ethernet MAC & PCS 100G/200G/400G/800G
- Ethernet PCS 100G/200G/400G/800G/1.6T
- Ethernet MAC 100G/200G/400G/800G/1.6T
- Junction Over-Temperature Detector with Linear Centigrade-to-Voltage Output - X-FAB XT018
- Performance P570 Gen 3
Related News
- Dolphin Integration first to achieve 0.84 pA per bit in SpRAM at the 90 nm uLL embedded flash process
- Dolphin Integration announces the availability of the new generation of SpRAM generator at 90 nm and 55 nm eFlash
- Mikron Licenses Cadence Physical Verification System and QRC Extraction Solutions for 90 nm IC Design Flow
- Dolphin Integration announce the availability of the TSMC sponsored sROMet and DpRAM generators at 90 nm LP eFlash
Latest News
- SkyeChip Berhad Delivers 35.0% Net Profit Growth Ahead of Main Market Debut on 20 May 2026
- Quantum eMotion and JMEM TEK Sign Consortium Agreement to Accelerate Quantum-Resilient Semiconductor SoC Development
- Silvaco Announces Immediate Availability of Mixel MIPI C-PHY/D-PHY Combo IP on TSMC N2P Process
- BrainChip Strikes IP Licensing Deal with ASICLAND
- Arteris Technology Adopted by Li Auto for Intelligent Vehicles