Mosis offers IBM 90-nm process on MPW
Peter Clarke, EE Times
(05/09/2006 3:13 PM EDT)
MUNICH, Germany
(05/09/2006 3:13 PM EDT)
MUNICH, Germany
â The Mosis integrated circuit fabrication service has begun offering multi-project wafer (MPW) runs on 90-nanometer process technologies from IBM, according to Paul Double, managing director of EDA Solutions Ltd.
EDA Solutions (Southampton, England) is the representative of Mosis in Europe.
The process is the 9SF process, which comes in three variants, low power digital, standard digital and analog and RF, said Double. The first customer submission deadline is Dec. 4, 2006, according to the Mosis website.
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