Malaysia's 1st Silicon works with Singapore's FTD on IP core verification
Malaysia's 1st Silicon works with Singapore's FTD on IP core verification
By Semiconductor Business News
February 26, 2002 (6:37 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020226S0044
KUCHING, Malaysia -- Semiconductor foundry supplier 1st Silicon (Malaysia) Sdn. Bhd. here today announced a marketing and technical support agreement with Singapore-based FTD Technology Pte. Ltd., a provider of analog and mixed-signal intellectual property (IP) for chip designs. "Both companies will select the IP cores to be designed onto a 1st Silicon testchip," said P. Bala, chief executive officer of FTD Technology. "We will coordinate the development, performance characterization, design flow verifications and functional verifications of FTD's cores based on 1st Silicon's testchip layout and test plans, their Spice models, library, and 1st Silicon's design rules." He said the collaboration will enable both companies to increase offerings for mutual customers. Four-year-old 1st Silicon's 200-mm wafer fab will have a capacity in excess of 30,000 eight-inch wafers per month when fully ramped. The company started volume production with 0.25 -micron digital and mixed-signal CMOS technology one year ago, and it has introduced 0.18-micron processes.
Related Semiconductor IP
- 1.6T Ultra Ethernet Controller
- Chiplet Die-to-Die Interconnect IP Solution
- High speed MACsec Engine 100G/200G/400G/800G/1.6T
- Temperature/Voltage sensors
- AMBA Bus Host to eSPI Controller/Target
Related News
- Truechip Partners with Advinno to Market Verification IP Products in Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia, Brunei & Cambodia
- BrisbaneSilicon publishes Beta Release of its Lumorphix Processor IP Core
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Codasip looks to Silicon Creations’ PLL to drive RISC-V Automotive Safety-Critical Core
Latest News
- Imec unlocks fourfold UWB range extension using world-first narrowband receiver chip compliant with IEEE 802.15.4ab standard
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology