INTERA Group Launches TinyML Toolkit to Accelerate AI Model Deployment and Benchmarking on Embedded Hardware

New development toolkit streamlines the journey from trained AI models to optimised, deployable embedded applications, with automated firmware generation, RISC-V integration, and comprehensive performance analytics.

BARCELONA, Spain, November 11, 2026 -- INTERA Group, a semiconductor technology company specialising in configurable Edge AI accelerator intellectual property (IP) and embedded intelligence solutions, announces the launch of its INTERA TinyML Toolkit, a software development solution designed to simplify and accelerate the deployment, optimisation, and benchmarking of artificial intelligence models on resource-constrained embedded hardware.

As demand for intelligent, low-power edge devices continues to grow across industrial, automotive, Internet of Things (IoT), and embedded computing applications, developers face increasing challenges in transitioning AI models from training environments to deployable hardware implementations.

INTERA's TinyML Toolkit addresses these challenges through an integrated development workflow that automates key stages, reduces manual integration effort, and enables systematic evaluation of AI inference performance.

Bridging the Gap Between AI Development and Embedded Deployment

The INTERA TinyML Toolkit transforms trained TensorFlow and Keras models into deployable embedded applications through a streamlined six-stage workflow:

Convert → Generate → Benchmark → Build → Deploy → Analyse

The toolkit converts and quantises AI models into TensorFlow Lite format, generates TensorFlow Lite Micro projects, prepares embedded firmware and benchmarking infrastructure, compiles applications for RISC-V targets, and deploys workloads to supported hardware platforms.

Once deployed, developers can evaluate inference execution using detailed performance analytics, including memory footprint, execution cycles, latency, layer-level performance, and hardware accelerator efficiency.

This unified workflow enables engineering teams to move from AI model development to hardware validation through a more reproducible, measurable, and efficient process.

Designed for INTERA's Cognit AI Accelerator Portfolio

A key differentiator of the TinyML Toolkit is its integration with INTERA's Cognit family of configurable AI accelerator IPs, enabling developers to evaluate and optimise AI workloads across different processing architectures.

The toolkit is designed to support five accelerator technologies within INTERA's Cognit portfolio:

• FALCON Cognit: A monolithic streaming AI accelerator optimised for efficient matrix-vector computations and low-power embedded inference.
• HAWK Advance Cognit: A RISC-V-based accelerator featuring custom instructions for matrix operations, designed for compact and energy-efficient AI processing.
• HAWK Pro Cognit: A high-performance, configurable RISC-V-based AI acceleration architecture supporting scalable processing capabilities.
• EAGLE Cognit: A near-memory computing accelerator designed to reduce data movement and improve energy efficiency during AI inference.
• HARRIER Cognit: A monolithic streaming accelerator supporting scalable matrix-matrix computations for demanding AI workloads.

Through accelerator-aware model optimisation, integer-quantised execution, and integrated benchmarking, the toolkit allows developers to compare hardware-accelerated inference against baseline CPU implementations.

This capability supports informed architectural decisions, helping engineering teams evaluate performance, memory utilisation, and computational efficiency before selecting a particular hardware configuration.

Comprehensive Development and Performance Analysis

The INTERA TinyML Toolkit brings together essential model optimisation, firmware development, embedded deployment, and performance analysis capabilities within a unified development environment.

AI Model Optimisation

The toolkit supports TensorFlow and Keras development workflows, offering quantisation and optimisation capabilities for supported neural network architectures.

These include Convolutional Neural Networks (CNNs), Fully Connected Neural Networks (FCNNs), Multilayer Perceptrons (MLPs), Recurrent Neural Networks (RNNs), Long Short-Term Memory (LSTM) networks, and Gated Recurrent Units (GRUs).

By supporting quantised inference, the toolkit helps developers adapt AI workloads to the processing and memory constraints of embedded hardware.

Automated Firmware Generation

The toolkit integrates the TensorFlow Lite Micro runtime and supports automated generation of embedded application projects, C-compatible model assets, benchmarking infrastructure, and configurable memory allocation.

These capabilities reduce repetitive development tasks and simplify the preparation of AI inference applications for supported embedded targets.

Embedded Hardware Deployment

The development environment incorporates RISC-V toolchain integration, deployment support for compatible FPGA and SoC platforms, and automated build and flashing workflows.

OpenOCD and GDB debugging capabilities provide additional support for application testing, execution analysis, and hardware-level development.

Performance Analytics

The toolkit provides detailed performance reporting to help developers understand how AI workloads behave on embedded hardware.

Its analytical capabilities include:

• HTML performance reports: Structured results for reviewing inference execution.
• Layer-by-layer profiling: Analysis of computational performance across neural network layers.
• Execution cycle counting: Measurement of processing cycles for supported workloads.
• Memory analysis: Evaluation of memory footprint and allocation requirements.
• Accelerator versus CPU benchmarking: Comparison of hardware-accelerated inference against baseline CPU execution.

Together, these capabilities provide a consistent framework for evaluating TinyML applications, validating accelerator architectures, and preparing embedded AI implementations for further product development.

Enabling the Next Generation of Edge AI Applications

The INTERA TinyML Toolkit is designed for semiconductor developers, embedded software engineers, AI researchers, and product development teams working on intelligent edge devices.

Its capabilities support a broad range of applications where computational efficiency, low latency, and predictable execution performance are essential.

Potential application areas include:

• Industrial Predictive Maintenance: Supporting intelligent monitoring, fault detection, and equipment condition analysis.
• Intelligent Sensing: Enabling local AI inference for sensors and embedded monitoring systems.
• Autonomous Systems: Supporting efficient on-device processing for perception and decision-support applications.
• Robotics: Facilitating the development and evaluation of AI workloads for embedded robotic platforms.
• Wearable Electronics: Supporting compact AI models in devices with constrained processing and energy resources.
• Battery-Powered IoT Devices: Enabling efficient intelligence in connected systems with limited power budgets.

By connecting AI model development with measurable hardware execution, INTERA aims to make advanced Edge AI technologies more accessible and easier to integrate into next-generation embedded systems.

Advancing INTERA's Vision for Configurable Edge AI

The launch of the TinyML Toolkit strengthens INTERA's broader technology ecosystem by complementing its configurable semiconductor IP portfolio with integrated software development tools.

Combining AI acceleration hardware with model optimisation, automated deployment, and benchmarking capabilities enables developers to evaluate architectures through a more systematic development process.

This hardware-software approach reinforces INTERA's objective of delivering flexible, energy-efficient, and application-specific Edge AI solutions.

With the TinyML Toolkit, INTERA continues to bridge the gap between AI algorithms, embedded software, and semiconductor hardware acceleration, supporting developers throughout the process of bringing intelligent applications to embedded devices.

Explore Intera IP:

• AI accelerator

About INTERA Group

INTERA Group is a European semiconductor technology company focused on developing configurable semiconductor IP, Edge AI acceleration technologies, and customised ASIC and FPGA solutions.

Through its Cognit family of AI accelerator IPs and complementary software development technologies, INTERA enables the integration of intelligent processing capabilities into embedded systems and next-generation semiconductor platforms.

The company is committed to advancing flexible, energy-efficient, and sovereign European semiconductor technologies for industrial, commercial, and strategic applications.

Discover the INTERA TinyML Toolkit

Interested in accelerating AI model deployment or evaluating INTERA's Cognit accelerator technologies?

Contact INTERA to discuss your AI workloads, target hardware, development requirements, and potential integration opportunities.

Email: info@intera-group.com

Contact INTERA Group