Why Opt For Chip Stack, FD-SOI in Image Sensors?
Junko Yoshida, EETimes
1/28/2016 02:30 PM EST
As camera functions become essential to differentiate embedded devices, designers of CMOS image sensors (CIS) find themselves wrestling with growing demands on multiple fronts – image quality, size of camera modules and overall cost.
Over the last few years, CIS vendors have embraced chip stacking. Under that option, a CIS is stacked with an image signal processor (ISP). As the next step, at least two major players, Sony and Samsung, are reportedly pondering the use of FD-SOI wafers in manufacturing ISPs for a chip stacked CIS.
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