Exostiv Labs achieves 50 Gbps interoperability tests with Avnet ONIX board.
July, 27th, 2020 -- Wavre, Belgium and Bnei Dror, Israel -- Exostiv Labs has successfully completed a round of advanced interoperability tests with Avnet’s ONIX ASIC prototyping system, equipped with the Xilinx Virtex Ultrascale XCVU440 FPGA.
Avnet’s ONIX ASIC prototyping system, co-developed by Avnet and Dgtronix, was successfully used with Exostiv Dashboard for Xilinx FPGA. This setup allowed collecting up to 8 GByte of debug trace from Virtex Ultrascale running at speed through transceivers. The system provided more 50 Gbps total bandwidth over FMC connectivity with Exostiv probe.
‘We are very satisfied with this result, Frederic Leens, CEO of Exostiv Labs says. Speed of setup and overall visibility are critical for ASIC prototyping on FPGA and complex high-speed applications such as low latency Ethernet and acceleration. Not only did Avnet’s board interoperate right away with Exostiv probe, but it provided up to 50 Gbps total bandwidth for collecting debugging trace “out of the box” from its FMC connectors.”

With its library of plug-in boards and its modular architecture, ONIX provides a flexible environment for FPGA-based prototyping of ASIC and SoC. As a board, and technology-independent tool, EXOSTIV complements this environment by adding unprecedented visibility into the chip.
‘Visibility is essential to FPGA-based prototyping’, Itamar Kahalani, FAE at Avnet says. “Exostiv’s impressive performance goes much beyond what other instrumentation solutions are capable of, in terms of the number of internal data nodes, trace depth and ability to visualize exceptionally large capture data sets. Exostiv is the ideal EDA tool for ONIX because it makes the most of the ASIC prototype’.
The ONIX ASIC prototyping platform is designed for rapid prototyping and ASIC emulation of high-performance, high-complexity systems. It is available through Avnet Silica across EMEA and Avnet Worldwide.
For more information and a demonstration:
https://www.exostivlabs.com/fpga-prototyping-platform-gets-visibility-with-exostiv/
Related Semiconductor IP
- 1.6T Ultra Ethernet Controller
- Chiplet Die-to-Die Interconnect IP Solution
- High speed MACsec Engine 100G/200G/400G/800G/1.6T
- Temperature/Voltage sensors
- AMBA Bus Host to eSPI Controller/Target
Related News
- New 64-Bit, 133 MHz PCI-X Design Kit from Avnet and Jungo Drives Successful Completion of PCI-X Compliance Tests at the Recent PCI PlugFest
- L&T Infotech completes Interoperability Tests of LTE-UE with Trillium eNodeB software
- Molex and Credo to Demonstrate 50 Gbps NRZ live serial traffic at DesignCon 2015
- Exostiv Labs announces the availability of its 'EXOSTIV' solution for FPGA debug.
Latest News
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology
- MIPI A-PHY To Power Industry’s First Four-Company Automotive SerDes Interoperability Demonstration at AutoSens USA