Deal enables MOSIS to offer XAP 16-bit processors
Colin Holland, EE Times
(07/21/2006 4:55 AM EDT)
LONDON — Cambridge Consultants has teamed up with multi-project wafer (MPW) services provider, MOSIS, to enable royalty-free access to their XAP4 and XAP5 16-bit RISC processor cores.
Customers only have to pay 20% of the nominal license fee during prototype production with the balance of the fee not being due until devices go into volume production or are sold.
XAP processors are delivered in Verilog RTL and users can verify their systems in FPGA before proceeding to ASIC synthesis.
(07/21/2006 4:55 AM EDT)
LONDON — Cambridge Consultants has teamed up with multi-project wafer (MPW) services provider, MOSIS, to enable royalty-free access to their XAP4 and XAP5 16-bit RISC processor cores.
Customers only have to pay 20% of the nominal license fee during prototype production with the balance of the fee not being due until devices go into volume production or are sold.
XAP processors are delivered in Verilog RTL and users can verify their systems in FPGA before proceeding to ASIC synthesis.
To read the full article, click here
Related Semiconductor IP
- Chiplet Die-to-Die Interconnect IP Solution
- High speed MACsec Engine 100G/200G/400G/800G/1.6T
- Temperature/Voltage sensors
- AMBA Bus Host to eSPI Controller/Target
- AMBA Bus Host to eSPI Controller
Related News
- The virtual component "FLIP8051 Typhoon" launches the 16 bit extension of the most popular processor: Keil Software provides a complete application development in µVision2 with hardware from Raisonance
- Brite Launches High-Precision 16 bit SAR ADC
- NXP Ramps Automotive Processing Innovation with Two Processors on TSMC 16nm FinFET Technology
- BittWare selects EdgeCortix's SAKURA-I AI Processors as its Edge Focused Artificial Intelligence Acceleration Solution
Latest News
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology
- MIPI A-PHY To Power Industry’s First Four-Company Automotive SerDes Interoperability Demonstration at AutoSens USA