100G MAC and 100G PCS IP Cores for high performance applications are now available
Copenhagen, Denmark, September 21, 2021 - Comcores ApS, a fast-growing specialized supplier of Intellectual Property (IP) Cores, today announced the availability of a 100G Ethernet MAC IP including the Reconciliation Sublayer (RS), as well as a 100G PCS IP that includes RS-FEC and Base-R (SC)- FEC sublayers.
Comcores Ethernet MAC 100G provides a complete IEEE 802.3 Ethernet Layer 2 solution. The MAC IP core performs the Link function of the 100G Ethernet Standard and is a low latency cut-through implementation reaching best in market results while still keeping size at a minimum. The Ethernet MAC Core, on the Client side, implements a 256-bit AXI-S Client interface while having a standard 256-bit CGMII interface on the PHY side.
Comcores PCS 100G IP core is a silicon agnostic implementation of the PCS layer described in the Ethernet standard IEEE 802.3-2018 and compliant with Clause 82 of IEEE 802.3ba and Clause 91 of IEEE 802.3bj specification. The IP-core has been optimized for size and offers a CGMII interface on one side and a 4 lane 10-66-bit parallel interface at the PMA-side.
Comcores Silicon Agnostic MAC and PCS IP cores are Designed in System Verilog and targeting any RTL implementation such as ASICs and FPGAs. The MAC and PCS IPs are highly configurable and can be delivered in a subsystem integrated with Comcores Time Stamping Unit IP and IEEE 1588 Software solution.
About Comcores
Comcores is a Key supplier of digital IP Cores and design services for digital subsystems with a focus on Ethernet Solutions, Wireless Fronthaul and C-RAN, and Chip to Chip Interfaces. Comcores’ mission is to provide best-in-class, state of the art, quality components and design services to ASIC, FPGA, and System vendors, and thereby drastically reduce their product cost, risk, and time to market. Our long-term background in building communication protocols, ASIC development, wireless networks and digital radio systems has brought a solid foundation for understanding the complex requirements of modern communication tasks. This know-how is used to define and build state-of-the-art, high-quality products used in communication networks.
To learn more about this solution from Comcores, please contact us at sales@comcores.com or visit www.comcores.com.
Related Semiconductor IP
- Low Latency Ethernet 100G MAC and PHY Intel® FPGA IP Core
- High Speed Ethernet 100G MAC IP
- UltraScale Integrated 100G Ethernet Subsystem
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
Related News
- MorethanIP and Innocor announce the interoperability check of MorethanIP 10 Gigabit Ethernet MAC (Medium Access Control) and 10G-BaseR PCS (Physical Coding Sub-Layer) with Innocor’s 10 Gigabit Ethernet test solution
- Evatronix enhances its Ethernet MAC product line with MAC-1G PCS IP core
- Virtex-5 TXT Platform Delivers First Single FPGA Solution for Building 40G and 100G Telecommunications Equipment
- ViaSat Announces New 100G Optical Transport Forward Error Correction (FEC) Products and Digital Signal Processing Services
Latest News
- Arteris Deployed by Speedata for Data Center Compute
- Siemens to acquire Defacto Technologies to complement its EDA portfolio with automated SoC design creation
- Mach42 Completes £7M Funding Round, Led by IP Group With Investment From BGF and Foresight Group
- ELECTRA IC Unveils Comprehensive IP Core Suite for Next-Generation Post-Quantum Cryptography
- CAST Enhances Serial Memory Controller IP with Encryption, Low-Power, and ASIL-Ready Options