Achieving ISO 26262 ASIL-B Certification for Functional Safety, Chips&Media’s ‘WAVE6331X FuSa’ Video Codec IP Meets the Rigorous Safety Standards Required by the Premium Automotive and Robotics Markets
- Pre-certified SEooC Platform Available – Supporting reduction of customer integration effort, development time, and assessment burden
- Fault Handling Mechanism Implemented – Minimizing Video CODEC IP malfunction risks in autonomous driving vision systems
- Low Hardware Overhead Architecture Proven – Supporting high levels of functional safety without sacrificing chip area or power efficiency
- Advanced Codec Lineup Ready for Automotive Integration – Successfully porting ASIL-B safety to legacy H.264/AVC, H.265/HEVC, AV1 by AOM, and infotainment-dominant VP9 codecs
- Rigorous Safety Assessment Successfully Concluded – Strengthening access to the global automotive supply chain through certification by DNV
September 2, 2026 – Chips&Media (CEO Steve Kim, KOSDAQ: 094360), a leading global provider of multimedia intellectual property (IP), announced today that its next-generation video codec hardware IP, ‘WAVE6331X FuSa (Functional Safety),’ has officially achieved the ISO 26262 ASIL-B certification from the independent third-party global certification body, DNV.

Chips&Media's ISO 26262 ASIL-B Certificate from DNV in September 2026
This milestone is the direct result of more than two years of intensive R&D investment, driven by predicting the explosive demand in the future automotive market. With this certification, Chips&Media secures a unique competitive edge to lead the high-value automotive semiconductor sector, including Advanced Driver Assistance Systems (ADAS) and In-Vehicle Infotainment (IVI), moving beyond its established success in the mobile and consumer compute markets.
Fault Handling Mechanism: Fault Detection and Reaction to Support Functional Safety
As modern vehicles transform into autonomous driving platforms, the functional safety of video Codecs that process camera streams has become increasingly important for supporting safe vehicle operation. When internal hardware faults or data corruption occur due to harsh automotive environments, Chips&Media’s WAVE6331X FuSa is designed to detect relevant anomalies and support transition of the system into a safe state within the defined fault response time. This fault handling capability helps mitigate the risk of potential autonomous driving malfunctions caused by frozen or corrupted video frames.
Architectural Efficiency: Supporting ASIL-B Safety Objectives with Minimal Hardware Overhead
In semiconductor designs for functional safety, achieving a defined ASIL target often requires additional safety mechanisms, which may increase chip area and power consumption. Chips&Media’s low-power architecture is designed to balance functional safety requirements with area and power efficiency. By integrating safety mechanisms such as real-time CRC protection and instruction flow monitoring into the IP architecture, WAVE6331X FuSa is designed to detect relevant faults and support achievement of the ASIL-B safety target under the defined assumptions of use, while minimizing hardware area and power penalties.
Advanced Multimedia Synergy: Porting Automotive Safety to AV1 and VP9
While automotive video solutions have traditionally been limited to established codec standards due to certification challenges, Chips&Media has expanded the applicability of ISO 26262-based functional safety development to AVC/HEVC, AV1, and VP9 codec IPs. This provides automotive semiconductor manufacturers with greater flexibility to integrate advanced video technologies while supporting functional safety requirements for connected vehicle applications.
Chips&Media is also preparing to apply the same functional safety technology framework to emerging video standards such as AV2 and VVC (Versatile Video Coding), paving the way for future commercial deployment.
Commitment: "We Finished the Hard Work; Customers Just Build the Chip"
This SEooC certification is expected to help automotive System-on-Chip (SoC) developers reduce integration effort and support development of their chip-level functional safety. Normally, tier-1 suppliers and chip makers have to spend months of labor and massive budgets to verify every internal block for final OEM submission. Chips&Media provides a certified SEooC package, including a Safety Manual, to support customers’ integration, verification, and safety assessment activities at the SoC level.
“Achieving the ISO 26262 ASIL-B certification proves that Chips&Media's functional safety design capabilities are world-class, marking our official evolution from a multimedia IP provider into a global automotive safety leader,” stated Steve Kim, CEO of Chips&Media. “Chips&Media’s video codec IP is adopted by three of the world's top five automotive chipmakers. Our comprehensive safety manual and guidelines will help to reduce development risks and effort for our global partner network. Moving forward, we will expand aggressively beyond being a traditional multimedia vendor to become an essential, trusted technology partner leading the future autonomous driving and mobility ecosystem.”
Explore Chips&Media IP:
- Video CODEC - AV1, HEVC, AVC, VP9 (VP9: Decoder only)
- Video Decoder - AV1, HEVC, AVC, VP9
- Specialized Video Processing NPU IP for SR, NR, Demosaic, AI ISP, Object Detection, Semantic Segmentation
- Dual-core video codec - AV1, HEVC, AVC, VP9 (VP9: Decoder only)
About Chips&Media Inc.
Chips&Media is a multimedia IP leader offering HW video codec IP, image processing NPU, lossless/lossy frame buffer compression IP and more. Since 2003, Chips&Media has exclusively focused on the HW video codec IP industry. It has powered over 3,000,000,000 units in the market, adopted by more than 150 semiconductor companies. Chips&Media's video codec IP supports all major and legacy formats from 1080p up to 8K 120fps, including HEVC/H.265, AVC/H.264, AV1, AV2, VP9, APV, VVC, JPEG and others. The recent introduction of our image processing NPU IP is transforming Chips&Media into a premium multimedia IP provider. It is a custom NPU designed to work for imaging applications at high-quality and high-resolution in edge devices. For more information, please visit our website at www.chipsnmedia.com
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