Carbon, CoWare link RTL to SystemC
Richard Goering
(06/29/2004 7:00 PM EDT)
SAN JOSE, Calif. — Claiming that co-simulation between a SystemC simulator and an event-driven RTL simulator is no longer needed, EDA startup Carbon Design Systems has announced that its DesignPlayer hardware and software validation modeling system works in CoWare's ConvergenSC SystemC simulation environment. Carbon also joined CoWare's CoTeam partnership program.
The link allows users to validate RTL versions of their designs in CoWare's SystemC simulation environment. It thus makes it possible to swap between architectural and RTL models, and to bring legacy IP into a SystemC simulation, according to representatives of both companies.
Users feed Carbon's SpeedCompiler software synthesizable Verilog code, and the tool generates a high-performance engine — called DesignPlayer — that now includes an optional SystemC wrapper.
Carbon claims DesignPlayer models are cycle and register accurate, and comparable in speed to designs running on hardware emulation. Thus, transferring designs into DesignPlayer models and running them with ConvergenSC will allow hardware engineers to quickly validate their RTL designs meet system specifications, and allow software engineers to get an early jump on validating software drivers, diagnostics and firmware, according to Carbon.
Carbon
Related Semiconductor IP
- 1.6T Ultra Ethernet Controller
- Chiplet Die-to-Die Interconnect IP Solution
- High speed MACsec Engine 100G/200G/400G/800G/1.6T
- Temperature/Voltage sensors
- AMBA Bus Host to eSPI Controller/Target
Related News
- CoWare and LSI Logic Announce ConvergenSC SystemC Models for ZSP
- CoWare Adds ARM PrimeCell Peripherals to SystemC ConvergenSC Model Library
- CoWare Delivers SystemC Models for PMC-Sierra's RM7900 Processor Family
- Forte Design Systems And Summit Design Join Forces To Deliver An Enhanced SystemC to RTL Design, Synthesis, And Verification Environment
Latest News
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology
- MIPI A-PHY To Power Industry’s First Four-Company Automotive SerDes Interoperability Demonstration at AutoSens USA