Allegro DVT Announces Mass Shipment of its WiGig WDE Silicon IP.
Grenoble - June 4, 2015 -- Allegro DVT today announced that it has reached a major milestone for its award-winning WiGig WDE (Wireless Display Extension) Silicon IP which is now shipping in mass volume in multiple OEM products.
The WiGig standard was developed by the WiGig Alliance (now part of the Wi-Fi Alliance) to enable multi-gigabit speed wireless communication. The standard enables speeds of up to 7 Gbit/s over the 60 GHz frequency band. Allegro DVT leveraged this next-generation wireless communications technology to offer high-quality and low-latency video data compression through its WDE Codec IP.
Allegro DVT's WiGig WDE Codec IP received the Frost & Sullivan 2013 global new product innovation leadership award. It enables wireless transmission of audio and video data with best-in-class visually lossless quality and ultra-low glass-to-glass latency below 1ms.
"We are proud to see the first shipments of products featuring our award-winning WiGig technology. This comes as a clear recognition for our leadership in wireless display technology." said Pierre Marty, CEO of Allegro DVT.
Products incorporating Allegro DVT's WiGig WDE technology open up a wide range of wireless display applications including office productivity, gaming and home entertainment.
Allegro DVT will carry out live demonstrations of products featuring its WiGig WDE IP at DAC 2015, June 8-10 - San Francisco, booth #2202 .
Read more on Allegro DVT products for IC vendors: http://www.allegrodvt.com
Allegro DVT is a leading provider of H.264/MPEG-4 AVC|SVC|MVC, HEVC/H.265 and VP9 solutions, including industry standard compliance test suites, H.264/MPEG-4 AVC, HEVC/H.265 and VP9 encoder, codec and decoder hardware (RTL) IPs. Allegro DVT products have been chosen by more than 100 major IC providers, OEMs and broadcasters. For more information, visit Allegro DVT's website or contact info@allegrodvt.com.
Related Semiconductor IP
Related News
- Silicon Proven AV1 Decoder IP with support for 12-bit pixel size and 4:4:4 Chroma Sub-Sampling Released by Allegro DVT
- Allegro DVT’s Pulsar Decoder IP adds support for AV2 video codec
- Allegro's MPEG-4 AVC/H.264 Certification Test Suites Selected by STMicroelectronics
- Allegro introduces world's first H.264/MPEG-4 AVC High-Profile/High-Definition Hardware Video Encoding IP
Latest News
- TSMC September 2026 Revenue Report
- Lattice Collaborates with Arm to Advance Secure, Adaptable AI Data Center Infrastructure
- ZLG Selects CAST CAN XL and TSN IP for Next-Generation Vehicle-Network Development and Test Tools
- Vayavya Labs and Tenstorrent Partner to Accelerate RISC-V Hardware and Software Development Through Virtual Platform Modeling
- RaiderChip’s Edge NPU reaches more than 50 Generative AI Models with the addition of Qwen3.8-27B