Agere licenses BIST technology from LogicVision to reduce test costs
Agere licenses BIST technology from LogicVision to reduce test costs
By Semiconductor Business News
June 4, 2002 (5:52 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020604S0052
SAN JOSE -- LogicVision Inc. today announced that Agere Systems Inc. has licensed its built-in-self-test (BIST) technology for use in its chip lines. Under the agreement, Agere will use LogicVision's Embedded Test 4.0 for its hierarchical test design, debug and seamless integrated manufacturing test infrastructure. LogicVision's embedded test solution allows integrated circuit designers to embed test functionality into a semiconductor design. As part of the multi-year agreement, Agere will deploy Embedded Test 4.0 to its design groups, delivering time-to-market value by reducing design-for-test implementation and verification time.
Related Semiconductor IP
- NPU IP
- JPEG XL Encoder
- I2C Master/Slave Controller Core
- NVMe Validation Test Suite
- Hybrid Memory Cube Verification IP
Related News
- LogicVision calls on 'ET' 4.0 to lower test costs for SoCs
- Q-Star Test nv joins LogicVision Ready™ partner program to help further reduce test costs and enhance yield
- LogicVision Introduces Fastest Silicon Debug Saving Development Time and Resource Costs
- Agere Systems Announces Platform for Wireless Equipment that can Shave More Than $25 Million in Software Costs
Latest News
- TSMC September 2026 Revenue Report
- Lattice Collaborates with Arm to Advance Secure, Adaptable AI Data Center Infrastructure
- ZLG Selects CAST CAN XL and TSN IP for Next-Generation Vehicle-Network Development and Test Tools
- Vayavya Labs and Tenstorrent Partner to Accelerate RISC-V Hardware and Software Development Through Virtual Platform Modeling
- RaiderChip’s Edge NPU reaches more than 50 Generative AI Models with the addition of Qwen3.8-27B