Think Silicon Launches Industry's Smallest Ultra-Low Power 3D GPU
2015-06-04 14:04:00
IP Cores & Design
Semiconductor IP News Archive - Page 720 of 1964
ARM and Samsung Sign Long-Term Agreement to Take Customers' Visual Experiences to a New Level
2015-06-04 09:23:00
Commercial Deals
Cadence Implementation and Signoff Tools Certified on Intel Custom Foundry 14nm Process
2015-06-04 09:16:00
EDA & Design Tools
NetSpeed Systems continues global expansion, expands presence in China
2015-06-04 06:27:00
Strategic Partnerships
Sankalp Semiconductor Announces FD-SOI Services and IP Partnership With STMicroelectronics
2015-06-04 06:10:00
Misc
OneSpin Solutions Adds Formal Fault Qualification Analysis to Safety Critical Apps Portfolio; Will Demonstrate OneSpin 360 Qualify at DAC
2015-06-04 02:27:00
EDA & Design Tools
Cadence Introduces Genus Synthesis Solution, Delivering Up to 10X Improvement in RTL Design Productivity
2015-06-03 17:09:00
EDA & Design Tools
Cadence Collaborates with Imagination Technologies to Significantly Improve Designer Productivity on PowerVR Graphics Cores Using Genus Synthesis Solution
2015-06-03 17:06:00
EDA & Design Tools
Toshiba Standardizes on PrimeRail for Rail Signoff
2015-06-03 15:51:00
EDA & Design Tools
Think Silicon Ltd. and Tortuga Pacific Announce a Sales Partnership
2015-06-03 15:32:00
Strategic Partnerships
New ARM IP Tooling Suite Reduces SoC Integration Time from Months to Days
2015-06-03 15:17:00
EDA & Design Tools
Nantero Closes $30M+ Series E Round; its Next-Generation Memory NRAM Now Installed in Multiple Production Fabs Around the World
2015-06-03 14:44:00
Strategic Partnerships
Development Platform released for Cortus APS Processor IP Cores
2015-06-03 13:41:00
SoC Architecture & Assembly
Global Semiconductor Sales Increase in April; Steady Growth Projected for Next Three Years
2015-06-03 08:39:00
Analysis & Insight
On China's List: Memory, Market Share, M&A
2015-06-03 08:25:00
Analysis & Insight
Samsung Licenses WiLAN Semiconductor Technology
2015-06-03 08:08:00
Legal & IP Strategy
Nationz Accelerates Design Closure with PrimeRail Signoff Solution
2015-06-03 06:53:00
EDA & Design Tools
GLOBALFOUNDRIES Solidifies 14nm FinFET Design Infrastructure for Next-Generation Chip Designs
2015-06-02 17:19:00
Foundries & Process Nodes
Allegro DVT adds VP9 support to its multi-format hardware encoder IP
2015-06-02 16:37:00
IP Cores & Design
Microsemi and Sibridge Technologies Collaborate to Develop Portfolio of High-speed Protocol IPs for SmartFusion2 and IGLOO2 FPGAs
2015-06-02 16:29:00
SoC Architecture & Assembly